Changes between Version 3 and Version 4 of Specification


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Timestamp:
Jun 27, 2009, 2:19:54 PM (15 years ago)
Author:
alain
Comment:

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  • Specification

    v3 v4  
    11[[PageOutline]]
    22
    3 = Architecture Overview =
     3= TSAR architecture overview =
    44
    55The TSAR shared memory architecture is a scalable, cache coherent, general-purpose multicore architecture. It is intended to support commodity applications and operating systems running on standard PCs, such as LINUX or FreeBSD. Therefore, the cache coherence must be entirely guaranteed by the hardware. Moreover, the TSAR architecture must provide hardware support for a paginated virtual memory and efficient atomic operations for synchronization.