Changes between Version 56 and Version 57 of VirtualMemory


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Timestamp:
Jul 20, 2016, 3:45:08 PM (8 years ago)
Author:
cfuguet
Comment:

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  • VirtualMemory

    v56 v57  
    339339The '''MMU_PARAMS''' register define the instruction and data caches & TLBs characteristics :
    340340
    341   ||WTD||STD||WCD||SCD||WTI||STI||WCI||SCI||NBL||
     341  ||WTD||STD||WCD||SCD||WTI||STI||WCI||SCI||NWL||
    342342 * WTD (3 bits) : Ln(number of associative ways for the Data TLB)
    343343 * STD (4 bits) : Ln(number of sets for the Data TLB)