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coh-order @ 14

Last change on this file since 14 was 11, checked in by cecile, 13 years ago
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1	# vis release 1.1 (compiled 25-Apr-96 at 11:35 AM)
2	# network name: COHERANCE
3	# generated: Tue May 14 18:26:43 1996
4	#
5	# name type mddId vals levs
6	proc1.proc_state latch 1 3 (0, 1)
7	proc1.proc_state$NS shadow 2 3 (2, 3)
8	inst1 primary-input 0 3 (4, 5)
9	cc1.cache_state latch 3 5 (6, 7, 8)
10	cc1.cache_state$NS shadow 4 5 (9, 10, 11)
11	cache_req1 latch 10 4 (12, 13)
12	cache_req1$NS shadow 11 4 (14, 15)
13	cc1.block_state latch 31 3 (20, 21)
14	cc1.block_state$NS shadow 32 3 (22, 23)
15	direc.arbiter_state latch 46 6 (24, 25, 26)
16	direc.arbiter_state$NS shadow 47 6 (27, 28, 29)
17	any_address1<0> primary-input 7 2 (30)
18	blk_add1<0> latch 8 2 (31)
19	blk_add1<0>$NS shadow 9 2 (32)
20	direc.cache_Wlist1<1> latch 20 2 (33)
21	direc.cache_Wlist1<1>$NS shadow 21 2 (34)
22	cc1.block_add<0> latch 5 2 (35)
23	cc1.block_add<0>$NS shadow 6 2 (36)
24	direc.cache_Wlist1<0> latch 22 2 (37)
25	direc.cache_Wlist1<0>$NS shadow 23 2 (38)
26	direc.cache_Rlist1<1> latch 24 2 (39)
27	direc.cache_Rlist1<1>$NS shadow 25 2 (40)
28	direc.cache_Rlist1<0> latch 26 2 (41)
29	direc.cache_Rlist1<0>$NS shadow 27 2 (42)
30	direc.cache_Rlist2<0> latch 16 2 (43)
31	direc.cache_Rlist2<0>$NS shadow 17 2 (44)
32	cc1.block_val latch 28 2 (45)
33	cc1.block_val$NS shadow 29 2 (46)
34	any_value1 primary-input 30 2 (47)
35	direc.main_mem<0> latch 42 2 (48)
36	direc.main_mem<0>$NS shadow 43 2 (49)
37	direc.main_mem<1> latch 40 2 (50)
38	direc.main_mem<1>$NS shadow 41 2 (51)
39	cc2.block_val latch 37 2 (52)
40	cc2.block_val$NS shadow 38 2 (53)
41	any_value2 primary-input 39 2 (54)
42	cc2.block_add<0> latch 53 2 (55)
43	cc2.block_add<0>$NS shadow 54 2 (56)
44	direc.cache_Rlist2<1> latch 18 2 (57)
45	direc.cache_Rlist2<1>$NS shadow 19 2 (58)
46	any_address2<0> primary-input 55 2 (59)
47	cc2.block_state latch 44 3 (60, 61)
48	cc2.block_state$NS shadow 45 3 (62, 63)
49	direc.cache_Wlist2<0> latch 14 2 (64)
50	direc.cache_Wlist2<0>$NS shadow 15 2 (65)
51	direc.cache_Wlist2<1> latch 12 2 (66)
52	direc.cache_Wlist2<1>$NS shadow 13 2 (67)
53	blk_add2<0> latch 33 2 (68)
54	blk_add2<0>$NS shadow 34 2 (69)
55	proc2.proc_state latch 49 3 (70, 71)
56	proc2.proc_state$NS shadow 50 3 (72, 73)
57	inst2 primary-input 48 3 (74, 75)
58	cc2.cache_state latch 51 5 (80, 81, 82)
59	cc2.cache_state$NS shadow 52 5 (83, 84, 85)
60	cache_req2 latch 35 4 (86, 87)
61	cache_req2$NS shadow 36 4 (88, 89)

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