source: vis_dev/vis-2.1/examples/coherence/p3.ctl @ 11

Last change on this file since 11 was 11, checked in by cecile, 13 years ago

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[11]1#The directory contains information about the cache content
2#that is coherent with the information in the cache controller
3# If the block is in state SHARED in the cache controller, its corresponding
4# bit is set in the Rlist of the directory
5AG(((direc.cache_Rlist1<*0*> = 1) -> AX((cc1.block_state=SHARED) * (cc1.block_add<0>=0))) +
6   ((((cc1.block_state=SHARED) * (cc1.block_add<0>=1))) -> (direc.cache_Rlist1<*0*> = 1)));
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