source: vis_dev/vis-2.1/examples/eisenberg/eisenberg.mv @ 15

Last change on this file since 15 was 11, checked in by cecile, 13 years ago

Add vis

File size: 25.4 KB
Line 
1# /tmp/yuji/next/vl2mv/snake/bin/vl2mv eisenberg.v
2# version: 0.2
3# date:    14:23:49 12/19/95 (PST)
4.model system
5# I/O ports
6
7.mv out_flag1 3 idle want_in in_cs
8.mv flag1 3 idle want_in in_cs
9.mv flag0 3 idle want_in in_cs
10.mv out_flag0 3 idle want_in in_cs
11.names _n0
120
13.subckt process p0 perm=perm0  flag0=flag0  flag1=flag1  out_flag=out_flag0  turn=turn  out_turn=out_turn0  i=_n0
14.names _n1
151
16.subckt process p1 perm=perm1  flag0=flag0  flag1=flag1  out_flag=out_flag1  turn=turn  out_turn=out_turn1  i=_n1
17# assign perm0  = $NDset ( ,0,1 )
18.names perm0
190
201
21# assign perm1  = ~perm0
22.names perm0 _n5
230 1 
241 0 
25.names _n5 perm1$raw_n4
26- =_n5
27# flag0  = 0
28.mv flag0$raw_n6 3 idle want_in in_cs
29.names flag0$raw_n6
30idle
31# flag1  = 0
32.mv flag1$raw_n7 3 idle want_in in_cs
33.names flag1$raw_n7
34idle
35# turn  = 0
36.names turn$raw_n8
370
38# non-blocking assignments for initial
39# st_perm0  = $NDset ( 0,1 )
40.names st_perm0$raw_n9$initial$_na
410
421
43.names st_perm0$raw_n9$initial$_na st_perm0$raw_n9
44- =st_perm0$raw_n9$initial$_na
45# non-blocking assignments for initial
46# st_perm1  = $NDset ( 0,1 )
47.names st_perm1$raw_nb$initial$_nc
480
491
50.names st_perm1$raw_nb$initial$_nc st_perm1$raw_nb
51- =st_perm1$raw_nb$initial$_nc
52# non-blocking assignments for initial
53# st_perm0  = perm0
54.names perm0 st_perm0$raw_nd
55- =perm0
56# st_perm1  = perm1
57.names perm1 st_perm1$raw_ne
58- =perm1
59.names _n10
601
61# perm0  == 1
62.names perm0 _n10 _n11
63.def 0
640 1 1
651 0 1
66.names _n11 _nf
670 1 
681 0 
69.names _nf _n13
70- =_nf
71# flag0  = out_flag0
72.mv flag0$_nf_n14$true 3 idle want_in in_cs
73.names out_flag0 flag0$_nf_n14$true
74- =out_flag0
75# turn  = out_turn0
76.names out_turn0 turn$_nf_n15$true
77- =out_turn0
78.names _n17
791
80# perm1  == 1
81.names perm1 _n17 _n18
82.def 0
830 1 1
841 0 1
85.names _n18 _n16
860 1 
871 0 
88.names _n16 _n1a
89- =_n16
90# flag1  = out_flag1
91.mv flag1$_n16_n1b$true 3 idle want_in in_cs
92.names out_flag1 flag1$_n16_n1b$true
93- =out_flag1
94# turn  = out_turn1
95.names out_turn1 turn$_n16_n1c$true
96- =out_turn1
97# if/else (perm1  == 1)
98.names turn$_n16_n1c$true turn _n16 turn$_n16$raw_n25
990 - 1 0
1001 - 1 1
101- 0 0 0
102- 1 0 1
103.mv flag1$_n16$raw_n27 3 idle want_in in_cs
104.names flag1$_n16_n1b$true flag1 _n16 flag1$_n16$raw_n27
105- - 0 =flag1
106- - 1 =flag1$_n16_n1b$true
107# if/else (perm0  == 1)
108.names turn$_nf_n15$true turn$_n16$raw_n25 _nf turn$_nf$raw_n30
1090 - 1 0
1101 - 1 1
111- 0 0 0
112- 1 0 1
113.mv flag0$_nf$raw_n36 3 idle want_in in_cs
114.names flag0$_nf_n14$true flag0 _nf flag0$_nf$raw_n36
115- - 0 =flag0
116- - 1 =flag0$_nf_n14$true
117.mv flag1$_nf$raw_n3a 3 idle want_in in_cs
118.names flag1 flag1$_n16$raw_n27 _nf flag1$_nf$raw_n3a
119- - 0 =flag1$_n16$raw_n27
120- - 1 =flag1
121# conflict arbitrators
122.names _n13 _n1a _n3d
123.def 0
124 1 - 1
125 0 1 1
126.names _n3d turn$_nf$raw_n30 turn _n3e
1271 0 - 0
1281 1 - 1
1290 - 0 0
1300 - 1 1
131.names perm1$raw_n4  perm1
1320 0
1331 1
134.names _n13 _n1a _n3f
135.def 0
136 0 1 1
137.mv _n40 3 idle want_in in_cs
138.names _n3f flag1$_nf$raw_n3a flag1 _n40
1391 - - =flag1$_nf$raw_n3a
1400 - - =flag1
141.names _n13 _n46
142.def 0
143 1 1
144.mv _n47 3 idle want_in in_cs
145.names _n46 flag0$_nf$raw_n36 flag0 _n47
1461 - - =flag0$_nf$raw_n36
1470 - - =flag0
148.names _n4d
149.def 0
150 1
151.names _n4d st_perm1$raw_ne _n4e
152.def 0
1531 0 0
1541 1 1
155.names _n4f
156.def 0
157 1
158.names _n4f st_perm0$raw_nd _n50
159.def 0
1601 0 0
1611 1 1
162# non-blocking assignments
163# latches
164.r turn$raw_n8 turn
1650 0
1661 1
167.latch _n3e turn
168.r flag1$raw_n7 flag1
169- =flag1$raw_n7
170.latch _n40 flag1
171.r flag0$raw_n6 flag0
172- =flag0$raw_n6
173.latch _n47 flag0
174.r st_perm1$raw_nb st_perm1
1750 0
1761 1
177.latch _n4e st_perm1
178.r st_perm0$raw_n9 st_perm0
1790 0
1801 1
181.latch _n50 st_perm0
182# quasi-continuous assignment
183.end
184
185
186.model process
187# I/O ports
188.inputs turn
189.outputs out_turn
190.outputs out_flag
191.inputs flag1
192.inputs flag0
193.inputs i
194.inputs perm
195
196.mv flagturn 3 idle want_in in_cs
197.mv flagj 3 idle want_in in_cs
198.mv pc 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
199.mv out_flag 3 idle want_in in_cs
200.mv flag1 3 idle want_in in_cs
201.mv flag0 3 idle want_in in_cs
202# assign flagj  = (j  == 0) ? flag0  : flag1
203.mv flagj$raw_n51 3 idle want_in in_cs
204.names _n53
2050
206# j  == 0
207.names j _n53 _n54
208.def 0
2090 1 1
2101 0 1
211.names _n54 _n52
2120 1 
2131 0 
214# (j  == 0) ? flag0  : flag1
215.mv _n56 3 idle want_in in_cs
216.names flag0 flag1 _n52 _n56
217- - 0 =flag1
218- - 1 =flag0
219.names _n56 flagj$raw_n51
220- =_n56
221# assign flagturn  = (turn  == 0) ? flag0  : flag1
222.mv flagturn$raw_n57 3 idle want_in in_cs
223.names _n59
2240
225# turn  == 0
226.names turn _n59 _n5a
227.def 0
2280 1 1
2291 0 1
230.names _n5a _n58
2310 1 
2321 0 
233# (turn  == 0) ? flag0  : flag1
234.mv _n5c 3 idle want_in in_cs
235.names flag0 flag1 _n58 _n5c
236- - 0 =flag1
237- - 1 =flag0
238.names _n5c flagturn$raw_n57
239- =_n5c
240# assign out_flag  = (pc  == L1 ) ? 1 : (pc  == L7 ) ? 2 : (pc  == L16 ) ? 0 : (i  == 0) ? flag0  : flag1
241.mv out_flag$raw_n5d 3 idle want_in in_cs
242.mv _n5f 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
243.names _n5f
244L1
245# pc  == 0
246.names pc _n5f _n5e
247.def 0
248- =pc 1
249.mv _n61 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
250.names _n61
251L7
252# pc  == 6
253.names pc _n61 _n60
254.def 0
255- =pc 1
256.mv _n63 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
257.names _n63
258L16
259# pc  == 15
260.names pc _n63 _n62
261.def 0
262- =pc 1
263.names _n65
2640
265# i  == 0
266.names i _n65 _n66
267.def 0
2680 1 1
2691 0 1
270.names _n66 _n64
2710 1 
2721 0 
273# (i  == 0) ? flag0  : flag1
274.mv _n68 3 idle want_in in_cs
275.names flag0 flag1 _n64 _n68
276- - 0 =flag1
277- - 1 =flag0
278.mv _n69 3 idle want_in in_cs
279.names _n69
280idle
281# (pc  == 15) ? 0 : (i  == 0) ? flag0  : flag1
282.mv _n6a 3 idle want_in in_cs
283.names _n69 _n68 _n62 _n6a
284- - 0 =_n68
285- - 1 =_n69
286.mv _n6b 3 idle want_in in_cs
287.names _n6b
288in_cs
289# (pc  == 6) ? 2 : (pc  == 15) ? 0 : (i  == 0) ? flag0  : flag1
290.mv _n6c 3 idle want_in in_cs
291.names _n6b _n6a _n60 _n6c
292- - 0 =_n6a
293- - 1 =_n6b
294.mv _n6d 3 idle want_in in_cs
295.names _n6d
296want_in
297# (pc  == 0) ? 1 : (pc  == 6) ? 2 : (pc  == 15) ? 0 : (i  == 0) ? flag0  : flag1
298.mv _n6e 3 idle want_in in_cs
299.names _n6d _n6c _n5e _n6e
300- - 0 =_n6c
301- - 1 =_n6d
302.names _n6e out_flag$raw_n5d
303- =_n6e
304# assign out_turn  = (pc  == L11 ) ? i  : (pc  == L15 ) ? j  : turn
305.mv _n71 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
306.names _n71
307L11
308# pc  == 10
309.names pc _n71 _n70
310.def 0
311- =pc 1
312.mv _n73 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
313.names _n73
314L15
315# pc  == 14
316.names pc _n73 _n72
317.def 0
318- =pc 1
319# (pc  == 14) ? j  : turn
320.names j turn _n72 _n74
3210 - 1 0
3221 - 1 1
323- 0 0 0
324- 1 0 1
325# (pc  == 10) ? i  : (pc  == 14) ? j  : turn
326.names i _n74 _n70 _n76
3270 - 1 0
3281 - 1 1
329- 0 0 0
330- 1 0 1
331.names _n76 out_turn$raw_n6f
332- =_n76
333# assign nond_exit  = $NDset ( ,0,1 )
334.names nond_exit
3350
3361
337# j  = 0
338.names j$raw_n7a
3390
340# pc  = 0
341.mv pc$raw_n7b 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
342.names pc$raw_n7b
343L1
344# non-blocking assignments for initial
345.names _n7d
3461
347# perm  == 1
348.names perm _n7d _n7e
349.def 0
3500 1 1
3511 0 1
352.names _n7e _n7c
3530 1 
3541 0 
355.names _n7c _n80
356- =_n7c
357.mv _n83 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
358.names _n83
359L1
360.names pc _n83 _n82
361.def 0
362- =pc 1
363.names _n82  _n81
3641 1
3650 0
366# pc  = 1
367.mv pc$_n81_n84$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
368.names pc$_n81_n84$true
369L2
370.mv _n87 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
371.names _n87
372L2
373.names pc _n87 _n86
374.def 0
375- =pc 1
376.names _n86  _n85
3771 1
3780 0
379# j  = turn
380.names turn j$_n85_n88$true
381- =turn
382# pc  = 2
383.mv pc$_n85_n89$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
384.names pc$_n85_n89$true
385L3
386.mv _n8c 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
387.names _n8c
388L3
389.names pc _n8c _n8b
390.def 0
391- =pc 1
392.names _n8b  _n8a
3931 1
3940 0
395# j  != i
396.names j i _n8e
397.def 0
3980 1 1
3991 0 1
400.names _n8e _n8d
401- =_n8e
402.names _n8d _n90
403- =_n8d
404# pc  = 3
405.mv pc$_n8d_n91$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
406.names pc$_n8d_n91$true
407L4
408# pc  = 6
409.mv pc$_n8d_n92$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
410.names pc$_n8d_n92$false
411L7
412# if/else (j  != i )
413.mv pc$_n8d$raw_n94 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
414.names pc$_n8d_n91$true pc$_n8d_n92$false _n8d pc$_n8d$raw_n94
415- - 0 =pc$_n8d_n92$false
416- - 1 =pc$_n8d_n91$true
417.mv _n99 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
418.names _n99
419L4
420.names pc _n99 _n98
421.def 0
422- =pc 1
423.names _n98  _n97
4241 1
4250 0
426.mv _n9b 3 idle want_in in_cs
427.names _n9b
428idle
429# flagj  != 0
430.names flagj _n9b _n9a
431.def 1
432- =flagj 0
433.names _n9a _n9c
434- =_n9a
435# pc  = 4
436.mv pc$_n9a_n9d$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
437.names pc$_n9a_n9d$true
438L5
439# pc  = 5
440.mv pc$_n9a_n9e$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
441.names pc$_n9a_n9e$false
442L6
443# if/else (flagj  != 0)
444.mv pc$_n9a$raw_na0 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
445.names pc$_n9a_n9d$true pc$_n9a_n9e$false _n9a pc$_n9a$raw_na0
446- - 0 =pc$_n9a_n9e$false
447- - 1 =pc$_n9a_n9d$true
448.mv _na5 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
449.names _na5
450L5
451.names pc _na5 _na4
452.def 0
453- =pc 1
454.names _na4  _na3
4551 1
4560 0
457# j  = turn
458.names turn j$_na3_na6$true
459- =turn
460# pc  = 2
461.mv pc$_na3_na7$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
462.names pc$_na3_na7$true
463L3
464.mv _naa 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
465.names _naa
466L6
467.names pc _naa _na9
468.def 0
469- =pc 1
470.names _na9  _na8
4711 1
4720 0
473.names _nac<0>
4740
475.names _nac<1>
4761
477.names _nad<0>
4781
479.names _nad<1>
4800
481# 2 - 1
482.names _naf
4830
484.names _nac<0> _nad<0> _naf _nae<0>
485.def 0
4860 0 1 1
4870 1 0 1
4881 0 0 1
4891 1 1 1
490# carry/borrow
491.names _nb1
4920
493.names _nac<0> _nad<0> _nb1 _nb0
494.def 0
4950 0 1 1
4960 1 0 1
4970 1 1 1
4981 1 1 1
499.names _nac<1> _nad<1> _nb0 _nae<1>
500.def 0
5010 0 1 1
5020 1 0 1
5031 0 0 1
5041 1 1 1
505# j  == 2 - 1
506.names j _nae<0> _nb2<0>
507.def 0
5080 1 1
5091 0 1
510.names _nae<1> _nb2<1>
511- =_nae<1>
512.names _nb2<0> _nb2<1> _nb3
513.def 1
5140 0 0
515.names _nb3 _nab
5160 1 
5171 0 
518.names _nab _nb4
519- =_nab
520# j  = 0
521.names j$_nab_nb5$true
5220
523# j  = j  + 1
524.names _nb7
5251
526# j  + 1
527.names _nb9
5280
529.names j _nb7 _nb9 _nb8
530.def 0
5310 0 1 1
5320 1 0 1
5331 0 0 1
5341 1 1 1
535# carry/borrow
536.names _nbb
5370
538.names j _nb7 _nbb _nba
539.def 0
5400 1 1 1
5411 0 1 1
5421 1 0 1
5431 1 1 1
544.names _nb8 j$_nab_nb6$false
545- =_nb8
546# if/else (j  == 2 - 1)
547.names j$_nab_nb5$true j$_nab_nb6$false _nab j$_nab$raw_nbd
5480 - 1 0
5491 - 1 1
550- 0 0 0
551- 1 0 1
552# pc  = 2
553.mv pc$_na8_nc1$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
554.names pc$_na8_nc1$true
555L3
556.mv _nc4 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
557.names _nc4
558L7
559.names pc _nc4 _nc3
560.def 0
561- =pc 1
562.names _nc3  _nc2
5631 1
5640 0
565# pc  = 7
566.mv pc$_nc2_nc5$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
567.names pc$_nc2_nc5$true
568L8
569.mv _nc8 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
570.names _nc8
571L8
572.names pc _nc8 _nc7
573.def 0
574- =pc 1
575.names _nc7  _nc6
5761 1
5770 0
578# j  = 0
579.names j$_nc6_nc9$true
5800
581# pc  = 8
582.mv pc$_nc6_nca$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
583.names pc$_nc6_nca$true
584L9
585.mv _ncd 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
586.names _ncd
587L9
588.names pc _ncd _ncc
589.def 0
590- =pc 1
591.names _ncc  _ncb
5921 1
5930 0
594.names _nce
5950
596# j  < 2
597.names _nd1
5980
599.names j _nce _nd1 _nd0
600.def 0
6010 0 1 1
6020 1 0 1
6031 0 0 1
6041 1 1 1
605# carry/borrow
606.names _nd3
6070
608.names j _nce _nd3 _nd2
609.def 0
6100 0 1 1
6110 1 0 1
6120 1 1 1
6131 1 1 1
614.names _nd0 _nd4
615- =_nd0
616.names _nd2 _nd4 _ncf
617.def 0
6181 1 1
619# j  == i
620.names j i _nd6
621.def 0
6220 1 1
6231 0 1
624.names _nd6 _nd5
6250 1 
6261 0 
627.mv _nd9 3 idle want_in in_cs
628.names _nd9
629in_cs
630# flagj  != 2
631.names flagj _nd9 _nd8
632.def 1
633- =flagj 0
634# (j  == i ) || (flagj  != 2)
635.names _nd5 _nd8 _nda
636.def 1
6370 0 0
638# (j  < 2) && ((j  == i ) || (flagj  != 2))
639.names _ncf _nda _ndb
640.def 0
6411 1 1
642.names _ndb _ndc
643- =_ndb
644# j  = j  + 1
645.names _nde
6461
647# j  + 1
648.names _ne0
6490
650.names j _nde _ne0 _ndf
651.def 0
6520 0 1 1
6530 1 0 1
6541 0 0 1
6551 1 1 1
656# carry/borrow
657.names _ne2
6580
659.names j _nde _ne2 _ne1
660.def 0
6610 1 1 1
6621 0 1 1
6631 1 0 1
6641 1 1 1
665.names _ndf j$_ndb_ndd$true
666- =_ndf
667# pc  = 8
668.mv pc$_ndb_ne3$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
669.names pc$_ndb_ne3$true
670L9
671# pc  = 9
672.mv pc$_ndb_ne4$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
673.names pc$_ndb_ne4$false
674L10
675# if/else ((j  < 2) && ((j  == i ) || (flagj  != 2)))
676.mv pc$_ndb$raw_ne7 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
677.names pc$_ndb_ne3$true pc$_ndb_ne4$false _ndb pc$_ndb$raw_ne7
678- - 0 =pc$_ndb_ne4$false
679- - 1 =pc$_ndb_ne3$true
680.names j$_ndb_ndd$true j _ndb j$_ndb$raw_nea
6810 - 1 0
6821 - 1 1
683- 0 0 0
684- 1 0 1
685.mv _nef 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
686.names _nef
687L10
688.names pc _nef _nee
689.def 0
690- =pc 1
691.names _nee  _ned
6921 1
6930 0
694.names _nf0
6950
696# j  >= 2
697.names _nf3
6980
699.names j _nf0 _nf3 _nf2
700.def 0
7010 0 1 1
7020 1 0 1
7031 0 0 1
7041 1 1 1
705# carry/borrow
706.names _nf5
7070
708.names j _nf0 _nf5 _nf4
709.def 0
7100 0 1 1
7110 1 0 1
7120 1 1 1
7131 1 1 1
714.names _nf2 _nf6
715- =_nf2
716.names _nf4 _nf6 _nf7
717.def 0
7181 1 1
719.names _nf7 _nf1
7200 1 
7211 0 
722# turn  == i
723.names turn i _nf9
724.def 0
7250 1 1
7261 0 1
727.names _nf9 _nf8
7280 1 
7291 0 
730.mv _nfc 3 idle want_in in_cs
731.names _nfc
732idle
733# flagturn  == 0
734.names flagturn _nfc _nfb
735.def 0
736- =flagturn 1
737# (turn  == i ) || (flagturn  == 0)
738.names _nf8 _nfb _nfd
739.def 1
7400 0 0
741# (j  >= 2) && ((turn  == i ) || (flagturn  == 0))
742.names _nf1 _nfd _nfe
743.def 0
7441 1 1
745.names _nfe _nff
746- =_nfe
747# pc  = 10
748.mv pc$_nfe_n100$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
749.names pc$_nfe_n100$true
750L11
751# pc  = 0
752.mv pc$_nfe_n101$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
753.names pc$_nfe_n101$false
754L1
755# if/else ((j  >= 2) && ((turn  == i ) || (flagturn  == 0)))
756.mv pc$_nfe$raw_n103 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
757.names pc$_nfe_n100$true pc$_nfe_n101$false _nfe pc$_nfe$raw_n103
758- - 0 =pc$_nfe_n101$false
759- - 1 =pc$_nfe_n100$true
760.mv _n108 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
761.names _n108
762L11
763.names pc _n108 _n107
764.def 0
765- =pc 1
766.names _n107  _n106
7671 1
7680 0
769# pc  = 11
770.mv pc$_n106_n109$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
771.names pc$_n106_n109$true
772L12
773.mv _n10c 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
774.names _n10c
775L12
776.names pc _n10c _n10b
777.def 0
778- =pc 1
779.names _n10b  _n10a
7801 1
7810 0
782.names _n10e
7831
784# nond_exit  == 1
785.names nond_exit _n10e _n10f
786.def 0
7870 1 1
7881 0 1
789.names _n10f _n10d
7900 1 
7911 0 
792.names _n10d _n111
793- =_n10d
794# pc  = 12
795.mv pc$_n10d_n112$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
796.names pc$_n10d_n112$true
797L13
798# pc  = 11
799.mv pc$_n10d_n113$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
800.names pc$_n10d_n113$false
801L12
802# if/else (nond_exit  == 1)
803.mv pc$_n10d$raw_n115 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
804.names pc$_n10d_n112$true pc$_n10d_n113$false _n10d pc$_n10d$raw_n115
805- - 0 =pc$_n10d_n113$false
806- - 1 =pc$_n10d_n112$true
807.mv _n11a 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
808.names _n11a
809L13
810.names pc _n11a _n119
811.def 0
812- =pc 1
813.names _n119  _n118
8141 1
8150 0
816.names _n11c<0>
8170
818.names _n11c<1>
8191
820.names _n11d<0>
8211
822.names _n11d<1>
8230
824# 2 - 1
825.names _n11f
8260
827.names _n11c<0> _n11d<0> _n11f _n11e<0>
828.def 0
8290 0 1 1
8300 1 0 1
8311 0 0 1
8321 1 1 1
833# carry/borrow
834.names _n121
8350
836.names _n11c<0> _n11d<0> _n121 _n120
837.def 0
8380 0 1 1
8390 1 0 1
8400 1 1 1
8411 1 1 1
842.names _n11c<1> _n11d<1> _n120 _n11e<1>
843.def 0
8440 0 1 1
8450 1 0 1
8461 0 0 1
8471 1 1 1
848# turn  == 2 - 1
849.names turn _n11e<0> _n122<0>
850.def 0
8510 1 1
8521 0 1
853.names _n11e<1> _n122<1>
854- =_n11e<1>
855.names _n122<0> _n122<1> _n123
856.def 1
8570 0 0
858.names _n123 _n11b
8590 1 
8601 0 
861.names _n11b _n124
862- =_n11b
863# j  = 0
864.names j$_n11b_n125$true
8650
866# j  = turn  + 1
867.names _n127
8681
869# turn  + 1
870.names _n129
8710
872.names turn _n127 _n129 _n128
873.def 0
8740 0 1 1
8750 1 0 1
8761 0 0 1
8771 1 1 1
878# carry/borrow
879.names _n12b
8800
881.names turn _n127 _n12b _n12a
882.def 0
8830 1 1 1
8841 0 1 1
8851 1 0 1
8861 1 1 1
887.names _n128 j$_n11b_n126$false
888- =_n128
889# if/else (turn  == 2 - 1)
890.names j$_n11b_n125$true j$_n11b_n126$false _n11b j$_n11b$raw_n12d
8910 - 1 0
8921 - 1 1
893- 0 0 0
894- 1 0 1
895# pc  = 13
896.mv pc$_n118_n131$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
897.names pc$_n118_n131$true
898L14
899.mv _n134 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
900.names _n134
901L14
902.names pc _n134 _n133
903.def 0
904- =pc 1
905.names _n133  _n132
9061 1
9070 0
908.mv _n136 3 idle want_in in_cs
909.names _n136
910idle
911# flagj  == 0
912.names flagj _n136 _n135
913.def 0
914- =flagj 1
915.names _n135 _n137
916- =_n135
917.names _n139<0>
9180
919.names _n139<1>
9201
921.names _n13a<0>
9221
923.names _n13a<1>
9240
925# 2 - 1
926.names _n13c
9270
928.names _n139<0> _n13a<0> _n13c _n13b<0>
929.def 0
9300 0 1 1
9310 1 0 1
9321 0 0 1
9331 1 1 1
934# carry/borrow
935.names _n13e
9360
937.names _n139<0> _n13a<0> _n13e _n13d
938.def 0
9390 0 1 1
9400 1 0 1
9410 1 1 1
9421 1 1 1
943.names _n139<1> _n13a<1> _n13d _n13b<1>
944.def 0
9450 0 1 1
9460 1 0 1
9471 0 0 1
9481 1 1 1
949# j  == 2 - 1
950.names j _n13b<0> _n13f<0>
951.def 0
9520 1 1
9531 0 1
954.names _n13b<1> _n13f<1>
955- =_n13b<1>
956.names _n13f<0> _n13f<1> _n140
957.def 1
9580 0 0
959.names _n140 _n138
9600 1 
9611 0 
962.names _n138 _n141
963- =_n138
964# j  = 0
965.names j$_n138_n142$true
9660
967# j  = j  + 1
968.names _n144
9691
970# j  + 1
971.names _n146
9720
973.names j _n144 _n146 _n145
974.def 0
9750 0 1 1
9760 1 0 1
9771 0 0 1
9781 1 1 1
979# carry/borrow
980.names _n148
9810
982.names j _n144 _n148 _n147
983.def 0
9840 1 1 1
9851 0 1 1
9861 1 0 1
9871 1 1 1
988.names _n145 j$_n138_n143$false
989- =_n145
990# if/else (j  == 2 - 1)
991.names j$_n138_n142$true j$_n138_n143$false _n138 j$_n138$raw_n14a
9920 - 1 0
9931 - 1 1
994- 0 0 0
995- 1 0 1
996# pc  = 13
997.mv pc$_n135_n14e$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
998.names pc$_n135_n14e$true
999L14
1000# pc  = 14
1001.mv pc$_n135_n14f$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1002.names pc$_n135_n14f$false
1003L15
1004# if/else (flagj  == 0)
1005.mv pc$_n135$raw_n152 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1006.names pc$_n135_n14e$true pc$_n135_n14f$false _n135 pc$_n135$raw_n152
1007- - 0 =pc$_n135_n14f$false
1008- - 1 =pc$_n135_n14e$true
1009.names j$_n138$raw_n14a j _n135 j$_n135$raw_n155
10100 - 1 0
10111 - 1 1
1012- 0 0 0
1013- 1 0 1
1014.mv _n15a 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1015.names _n15a
1016L15
1017.names pc _n15a _n159
1018.def 0
1019- =pc 1
1020.names _n159  _n158
10211 1
10220 0
1023# pc  = 15
1024.mv pc$_n158_n15b$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1025.names pc$_n158_n15b$true
1026L16
1027.mv _n15e 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1028.names _n15e
1029L16
1030.names pc _n15e _n15d
1031.def 0
1032- =pc 1
1033.names _n15d  _n15c
10341 1
10350 0
1036.names _n160
10371
1038# nond_exit  == 1
1039.names nond_exit _n160 _n161
1040.def 0
10410 1 1
10421 0 1
1043.names _n161 _n15f
10440 1 
10451 0 
1046.names _n15f _n163
1047- =_n15f
1048# pc  = 0
1049.mv pc$_n15f_n164$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1050.names pc$_n15f_n164$true
1051L1
1052# pc  = 15
1053.mv pc$_n15f_n165$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1054.names pc$_n15f_n165$false
1055L16
1056# if/else (nond_exit  == 1)
1057.mv pc$_n15f$raw_n167 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1058.names pc$_n15f_n164$true pc$_n15f_n165$false _n15f pc$_n15f$raw_n167
1059- - 0 =pc$_n15f_n165$false
1060- - 1 =pc$_n15f_n164$true
1061# case (pc )
1062.mv pc$_n15c$raw_n16c 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1063.names pc$_n15f$raw_n167 pc _n15c pc$_n15c$raw_n16c
1064- - 0 =pc
1065- - 1 =pc$_n15f$raw_n167
1066.mv pc$_n158$raw_n16e 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1067.names pc$_n158_n15b$true pc$_n15c$raw_n16c _n158 pc$_n158$raw_n16e
1068- - 0 =pc$_n15c$raw_n16c
1069- - 1 =pc$_n158_n15b$true
1070.mv pc$_n132$raw_n173 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1071.names pc$_n135$raw_n152 pc$_n158$raw_n16e _n132 pc$_n132$raw_n173
1072- - 0 =pc$_n158$raw_n16e
1073- - 1 =pc$_n135$raw_n152
1074.names j$_n135$raw_n155 j _n132 j$_n132$raw_n176
10750 - 1 0
10761 - 1 1
1077- 0 0 0
1078- 1 0 1
1079.mv pc$_n118$raw_n17b 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1080.names pc$_n118_n131$true pc$_n132$raw_n173 _n118 pc$_n118$raw_n17b
1081- - 0 =pc$_n132$raw_n173
1082- - 1 =pc$_n118_n131$true
1083.names j$_n11b$raw_n12d j$_n132$raw_n176 _n118 j$_n118$raw_n17c
10840 - 1 0
10851 - 1 1
1086- 0 0 0
1087- 1 0 1
1088.mv pc$_n10a$raw_n183 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1089.names pc$_n10d$raw_n115 pc$_n118$raw_n17b _n10a pc$_n10a$raw_n183
1090- - 0 =pc$_n118$raw_n17b
1091- - 1 =pc$_n10d$raw_n115
1092.names j j$_n118$raw_n17c _n10a j$_n10a$raw_n186
10930 - 1 0
10941 - 1 1
1095- 0 0 0
1096- 1 0 1
1097.mv pc$_n106$raw_n189 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1098.names pc$_n106_n109$true pc$_n10a$raw_n183 _n106 pc$_n106$raw_n189
1099- - 0 =pc$_n10a$raw_n183
1100- - 1 =pc$_n106_n109$true
1101.names j j$_n10a$raw_n186 _n106 j$_n106$raw_n18c
11020 - 1 0
11031 - 1 1
1104- 0 0 0
1105- 1 0 1
1106.mv pc$_ned$raw_n18f 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1107.names pc$_nfe$raw_n103 pc$_n106$raw_n189 _ned pc$_ned$raw_n18f
1108- - 0 =pc$_n106$raw_n189
1109- - 1 =pc$_nfe$raw_n103
1110.names j j$_n106$raw_n18c _ned j$_ned$raw_n192
11110 - 1 0
11121 - 1 1
1113- 0 0 0
1114- 1 0 1
1115.mv pc$_ncb$raw_n196 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1116.names pc$_ndb$raw_ne7 pc$_ned$raw_n18f _ncb pc$_ncb$raw_n196
1117- - 0 =pc$_ned$raw_n18f
1118- - 1 =pc$_ndb$raw_ne7
1119.names j$_ndb$raw_nea j$_ned$raw_n192 _ncb j$_ncb$raw_n197
11200 - 1 0
11211 - 1 1
1122- 0 0 0
1123- 1 0 1
1124.mv pc$_nc6$raw_n19f 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1125.names pc$_nc6_nca$true pc$_ncb$raw_n196 _nc6 pc$_nc6$raw_n19f
1126- - 0 =pc$_ncb$raw_n196
1127- - 1 =pc$_nc6_nca$true
1128.names j$_nc6_nc9$true j$_ncb$raw_n197 _nc6 j$_nc6$raw_n1a0
11290 - 1 0
11301 - 1 1
1131- 0 0 0
1132- 1 0 1
1133.mv pc$_nc2$raw_n1a7 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1134.names pc$_nc2_nc5$true pc$_nc6$raw_n19f _nc2 pc$_nc2$raw_n1a7
1135- - 0 =pc$_nc6$raw_n19f
1136- - 1 =pc$_nc2_nc5$true
1137.names j j$_nc6$raw_n1a0 _nc2 j$_nc2$raw_n1aa
11380 - 1 0
11391 - 1 1
1140- 0 0 0
1141- 1 0 1
1142.mv pc$_na8$raw_n1ae 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1143.names pc$_na8_nc1$true pc$_nc2$raw_n1a7 _na8 pc$_na8$raw_n1ae
1144- - 0 =pc$_nc2$raw_n1a7
1145- - 1 =pc$_na8_nc1$true
1146.names j$_nab$raw_nbd j$_nc2$raw_n1aa _na8 j$_na8$raw_n1af
11470 - 1 0
11481 - 1 1
1149- 0 0 0
1150- 1 0 1
1151.mv pc$_na3$raw_n1b7 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1152.names pc$_na3_na7$true pc$_na8$raw_n1ae _na3 pc$_na3$raw_n1b7
1153- - 0 =pc$_na8$raw_n1ae
1154- - 1 =pc$_na3_na7$true
1155.names j$_na3_na6$true j$_na8$raw_n1af _na3 j$_na3$raw_n1b8
11560 - 1 0
11571 - 1 1
1158- 0 0 0
1159- 1 0 1
1160.mv pc$_n97$raw_n1bf 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1161.names pc$_n9a$raw_na0 pc$_na3$raw_n1b7 _n97 pc$_n97$raw_n1bf
1162- - 0 =pc$_na3$raw_n1b7
1163- - 1 =pc$_n9a$raw_na0
1164.names j j$_na3$raw_n1b8 _n97 j$_n97$raw_n1c2
11650 - 1 0
11661 - 1 1
1167- 0 0 0
1168- 1 0 1
1169.mv pc$_n8a$raw_n1c5 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1170.names pc$_n8d$raw_n94 pc$_n97$raw_n1bf _n8a pc$_n8a$raw_n1c5
1171- - 0 =pc$_n97$raw_n1bf
1172- - 1 =pc$_n8d$raw_n94
1173.names j j$_n97$raw_n1c2 _n8a j$_n8a$raw_n1c8
11740 - 1 0
11751 - 1 1
1176- 0 0 0
1177- 1 0 1
1178.mv pc$_n85$raw_n1cc 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1179.names pc$_n85_n89$true pc$_n8a$raw_n1c5 _n85 pc$_n85$raw_n1cc
1180- - 0 =pc$_n8a$raw_n1c5
1181- - 1 =pc$_n85_n89$true
1182.names j$_n85_n88$true j$_n8a$raw_n1c8 _n85 j$_n85$raw_n1cd
11830 - 1 0
11841 - 1 1
1185- 0 0 0
1186- 1 0 1
1187.mv pc$_n81$raw_n1d4 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1188.names pc$_n81_n84$true pc$_n85$raw_n1cc _n81 pc$_n81$raw_n1d4
1189- - 0 =pc$_n85$raw_n1cc
1190- - 1 =pc$_n81_n84$true
1191.names j j$_n85$raw_n1cd _n81 j$_n81$raw_n1d7
11920 - 1 0
11931 - 1 1
1194- 0 0 0
1195- 1 0 1
1196# if/else (perm  == 1)
1197.mv pc$_n7c$raw_n1dd 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1198.names pc$_n81$raw_n1d4 pc _n7c pc$_n7c$raw_n1dd
1199- - 0 =pc
1200- - 1 =pc$_n81$raw_n1d4
1201.names j$_n81$raw_n1d7 j _n7c j$_n7c$raw_n1de
12020 - 1 0
12031 - 1 1
1204- 0 0 0
1205- 1 0 1
1206# conflict arbitrators
1207.names flagturn$raw_n57  flagturn
1208- =flagturn$raw_n57
1209.names flagj$raw_n51  flagj
1210- =flagj$raw_n51
1211.names _n80 _n81 _n85 _n8a _n90 _n97 _n9c _na3 _na8 _nc2 _nc6 _ncb _ndc _ned _nff _n106 _n10a _n111 _n118 _n132 _n137 _n158 _n15c _n163 _n1e0
1212.def 0
1213 1 1 - - - - - - - - - - - - - - - - - - - - - - 1
1214 1 0 1 - - - - - - - - - - - - - - - - - - - - - 1
1215 1 0 0 1 1 - - - - - - - - - - - - - - - - - - - 1
1216 1 0 0 1 0 - - - - - - - - - - - - - - - - - - - 1
1217 1 0 0 0 - 1 1 - - - - - - - - - - - - - - - - - 1
1218 1 0 0 0 - 1 0 - - - - - - - - - - - - - - - - - 1
1219 1 0 0 0 - 0 - 1 - - - - - - - - - - - - - - - - 1
1220 1 0 0 0 - 0 - 0 1 - - - - - - - - - - - - - - - 1
1221 1 0 0 0 - 0 - 0 0 1 - - - - - - - - - - - - - - 1
1222 1 0 0 0 - 0 - 0 0 0 1 - - - - - - - - - - - - - 1
1223 1 0 0 0 - 0 - 0 0 0 0 1 1 - - - - - - - - - - - 1
1224 1 0 0 0 - 0 - 0 0 0 0 1 0 - - - - - - - - - - - 1
1225 1 0 0 0 - 0 - 0 0 0 0 0 - 1 1 - - - - - - - - - 1
1226 1 0 0 0 - 0 - 0 0 0 0 0 - 1 0 - - - - - - - - - 1
1227 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 1 - - - - - - - - 1
1228 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 1 1 - - - - - - 1
1229 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 1 0 - - - - - - 1
1230 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 1 - - - - - 1
1231 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 1 1 - - - 1
1232 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 1 0 - - - 1
1233 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 0 - 1 - - 1
1234 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 0 - 0 1 1 1
1235 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 0 - 0 1 0 1
1236.mv _n1e1 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16
1237.names _n1e0 pc$_n7c$raw_n1dd pc _n1e1
12381 - - =pc$_n7c$raw_n1dd
12390 - - =pc
1240.names out_turn$raw_n6f  out_turn
12410 0
12421 1
1243.names out_flag$raw_n5d  out_flag
1244- =out_flag$raw_n5d
1245.names _n80 _n81 _n85 _n8a _n97 _na3 _na8 _nb4 _nc2 _nc6 _ncb _ndc _ned _n106 _n10a _n118 _n124 _n132 _n137 _n141 _n1eb
1246.def 0
1247 1 0 1 - - - - - - - - - - - - - - - - - 1
1248 1 0 0 0 0 1 - - - - - - - - - - - - - - 1
1249 1 0 0 0 0 0 1 1 - - - - - - - - - - - - 1
1250 1 0 0 0 0 0 1 0 - - - - - - - - - - - - 1
1251 1 0 0 0 0 0 0 - 0 1 - - - - - - - - - - 1
1252 1 0 0 0 0 0 0 - 0 0 1 1 - - - - - - - - 1
1253 1 0 0 0 0 0 0 - 0 0 0 - 0 0 0 1 1 - - - 1
1254 1 0 0 0 0 0 0 - 0 0 0 - 0 0 0 1 0 - - - 1
1255 1 0 0 0 0 0 0 - 0 0 0 - 0 0 0 0 - 1 1 1 1
1256 1 0 0 0 0 0 0 - 0 0 0 - 0 0 0 0 - 1 1 0 1
1257.names _n1eb j$_n7c$raw_n1de j _n1ec
12581 0 - 0
12591 1 - 1
12600 - 0 0
12610 - 1 1
1262# non-blocking assignments
1263# latches
1264.r pc$raw_n7b pc
1265- =pc$raw_n7b
1266.latch _n1e1 pc
1267.r j$raw_n7a j
12680 0
12691 1
1270.latch _n1ec j
1271# quasi-continuous assignment
1272.end
1273
1274
Note: See TracBrowser for help on using the repository browser.