[11] | 1 | |
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| 2 | ltl_model_check - perform LTL model checking on a flattened network |
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| 3 | _________________________________________________________________ |
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| 4 | |
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| 5 | ltl_model_check [-a <ltl2aut_algorithm>] [-b] [-d <dbg_level>] [-f |
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| 6 | <dbg_file>] [-h] [-i] [-m] [-s] [-t <time_out_period>][-v |
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| 7 | <verbosity_level>] [-A <le_method>] [-D <dc_level>] [-L |
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| 8 | <lockstep_mode>] [-S <schedule>] [-F] [-X] [-Y] [-M] <ltl_file> |
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| 9 | |
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| 10 | Performs LTL model checking on a flattened network. Before calling |
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| 11 | this command, the user should have initialized the design by calling |
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| 12 | the command [1]init_verify. Regardless of the options, no 'false |
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| 13 | positives' or 'false negatives' will occur: the result is correct for |
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| 14 | the given circuit. |
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| 15 | |
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| 16 | Properties to be verified should be provided as LTL formulae in the |
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| 17 | file ltl_file. Note that the support of any wire referred to in a |
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| 18 | formula should consist only of latches. For the precise syntax of LTL |
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| 19 | formulas, see the [2]VIS CTL and LTL syntax manual. |
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| 20 | |
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| 21 | A formula passes iff it is true for all initial states of the system. |
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| 22 | Therefore, in the presence of multiple initial states, if a formula |
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| 23 | fails, the negation of the formula may also fail. |
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| 24 | |
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| 25 | If a formula does not pass, a (potentially partial) proof of failure |
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| 26 | (referred to as a debug trace) is demonstrated. Fair paths are |
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| 27 | represented by a finite sequence of states (the stem) leading to a |
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| 28 | fair cycle, i.e. a cycle on which there is a state from each fairness |
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| 29 | condition. Whether demostrate the proof or not can be specified (see |
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| 30 | option -d). |
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| 31 | |
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| 32 | Command options: |
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| 33 | |
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| 34 | -a <ltl2aut_algorithm> |
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| 35 | Specify the algorithm used in LTL formula -> Buechi automaton |
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| 36 | translation. |
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| 37 | |
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| 38 | ltl2aut_algorithm must be one of the following: |
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| 39 | |
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| 40 | 0: GPVW. |
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| 41 | |
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| 42 | 1: GPVW+. |
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| 43 | |
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| 44 | 2: LTL2AUT. |
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| 45 | |
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| 46 | 3: WRING (default). |
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| 47 | |
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| 48 | -b |
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| 49 | Use boolean minimization during the LTL to Automaton |
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| 50 | translation. |
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| 51 | |
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| 52 | -d <dbg_level> |
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| 53 | Specify whether to demonstrate a counter-example when the |
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| 54 | system fails a formula being checked. |
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| 55 | |
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| 56 | dbg_level must be one of the following: |
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| 57 | |
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| 58 | 0: No debugging performed. dbg_level=0 is the default. |
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| 59 | |
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| 60 | 1: Generate a counter-example (a path to a fair cycle). |
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| 61 | |
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| 62 | -f <dbg_file> |
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| 63 | Write the debugger output to dbg_file. |
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| 64 | |
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| 65 | -h |
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| 66 | Print the command usage. |
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| 67 | |
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| 68 | -i |
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| 69 | Print input values causing transitions between states during |
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| 70 | debugging. Both primary and pseudo inputs are printed. |
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| 71 | |
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| 72 | -m |
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| 73 | Pipe debugger output through the UNIX utility more. |
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| 74 | |
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| 75 | -t <timeOutPeriod> |
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| 76 | Specify the time out period (in seconds) after which the |
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| 77 | command aborts. By default this option is set to infinity. |
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| 78 | |
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| 79 | -s |
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| 80 | Print debug output in the format accepted by the [3]simulate |
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| 81 | command. |
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| 82 | |
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| 83 | -v <verbosity_level> |
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| 84 | Specify verbosity level. This sets the amount of feedback on |
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| 85 | CPU usage and code status. |
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| 86 | verbosity_level must be one of the following: |
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| 87 | |
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| 88 | 0: No feedback provided. This is the default. |
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| 89 | |
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| 90 | 1: Feedback on code location. |
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| 91 | |
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| 92 | 2: Feedback on code location and CPU usage. |
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| 93 | |
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| 94 | -A <le_method> |
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| 95 | Specify whether the compositional SCC analysis algorithm, |
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| 96 | Divide and Compose (DnC), is enabled for language emptiness |
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| 97 | checking. The DnC algorithm first enumerates fair SCCs in an |
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| 98 | over-approximated abstract model, and then successively refines |
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| 99 | them in the more concrete models. Since non-fair SCCs can be |
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| 100 | ignored in the more concrete models, a potentially large part |
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| 101 | of the state space are pruned away early on when the |
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| 102 | computations are cheap. |
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| 103 | |
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| 104 | le_method must be one of the following: |
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| 105 | |
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| 106 | 0 : no use of Divide and Compose (Default). |
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| 107 | |
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| 108 | 1 : use Divide and Compose. |
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| 109 | |
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| 110 | -D <dc_level> |
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| 111 | Specify extent to which don't cares are used to simplify MDDs |
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| 112 | in model checking. Don't cares are minterms on which the value |
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| 113 | taken by functions does not affect the computation; |
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| 114 | potentially, these minterms can be used to simplify MDDs and |
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| 115 | reduce the time taken to perform model checking. |
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| 116 | dc_level must be one of the following: |
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| 117 | |
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| 118 | 0 : No don't cares are used. |
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| 119 | |
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| 120 | 1 : Use unreachable states as don't cares. This is the default. |
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| 121 | |
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| 122 | 2 : Use unreachable states as don't cares and in the EU |
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| 123 | computation, use 'frontiers' for image computation. |
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| 124 | |
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| 125 | 3 : First compute an overapproximation of the reachable states |
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| 126 | (ARDC), and use that as the cares set. Use `frontiers' for |
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| 127 | image computation. For help on controlling options for ARDC, |
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| 128 | look up help on the command: [4]print_ardc_options. Refer to |
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| 129 | Moon, Jang, Somenzi, Pixley, Yuan, "Approximate Reachability |
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| 130 | Don't Cares for {CTL} Model Checking", ICCAD98, and to two |
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| 131 | papers by Cho et al, IEEE TCAD December 1996: one is for State |
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| 132 | Space Decomposition and the other is for Approximate FSM |
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| 133 | Traversal. |
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| 134 | |
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| 135 | -S <schedule> |
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| 136 | Specify schedule for GSH algorithm, which generalizes the |
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| 137 | Emerson-Lei algorithm and is used to compute greatest |
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| 138 | fixpoints. The choice of schedule affects the sequence in which |
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| 139 | EX and EU operators are applied. It makes a difference only |
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| 140 | when fairness constraints are specified. |
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| 141 | <schedule> must be one of the following: |
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| 142 | |
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| 143 | EL : EU and EX operators strictly alternate. This is the |
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| 144 | default. |
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| 145 | |
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| 146 | EL1 : EX is applied once for every application of all EUs. |
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| 147 | |
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| 148 | EL2 : EX is applied repeatedly after each application of all |
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| 149 | EUs. |
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| 150 | |
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| 151 | budget : a hybrid of EL and EL2 |
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| 152 | |
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| 153 | random : enabled operators are applied in (pseudo-)random |
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| 154 | order. |
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| 155 | |
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| 156 | off : GSH is disabled, and the old algorithm is used instead. |
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| 157 | The old algorithm uses the EL , but the termination checks are |
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| 158 | less sophisticated than in GSH. |
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| 159 | |
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| 160 | -F |
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| 161 | Use forward analysis in the computation of the greatest |
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| 162 | fixpoint. This option is incompatible with -d 1 or higher and |
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| 163 | can only be used with -D 1. |
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| 164 | |
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| 165 | -L <lockstep_mode> |
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| 166 | Use the lockstep algorithm, which is based on fair SCC |
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| 167 | enumeration. |
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| 168 | <lockstep_mode> must be one of the following: |
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| 169 | |
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| 170 | off : Lockstep is disabled. This is the default. Language |
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| 171 | emptiness is checked by computing a hull of the fair SCCs. |
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| 172 | |
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| 173 | on : Lockstep is enabled. |
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| 174 | |
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| 175 | all : Lockstep is enabled; all fair SCCs are enumerated instead |
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| 176 | of terminating as soon as one is found. This can be used to |
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| 177 | study the SCCs of a graph, but it is slower than the default |
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| 178 | option. |
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| 179 | |
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| 180 | n : (n is a positive integer). Lockstep is enabled and up to n |
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| 181 | fair SCCs are enumerated. This is less expensive than all , but |
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| 182 | still less efficient than on , even when n = 1 . |
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| 183 | |
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| 184 | -X |
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| 185 | Disable strength reduction (use different decision procedures |
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| 186 | for strong, weak, and terminal automaton). Strength reduction |
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| 187 | is the default. Refer to Bloem, Ravi, Somenzi, "Efficient |
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| 188 | Decision Procedures for LTL Model Checking," CAV99. |
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| 189 | |
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| 190 | -Y |
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| 191 | Disable incremental construction of the partition for (MxA). |
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| 192 | Instead, build a new partition from the scratch. Incremental |
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| 193 | construction of the partition is the default. |
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| 194 | |
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| 195 | -Z |
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| 196 | Add arcs into the Buechi automaton by direct simulation |
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| 197 | relation, to heuristically reduce the length of shortest |
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| 198 | counter-example in model checking. Refer to Awedh and Somenze, |
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| 199 | "Proving More Properties with Bounded Model Checking," CAV04. |
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| 200 | |
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| 201 | -M |
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| 202 | Maximize (adding arcs to) Buechi automaton using Direct |
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| 203 | Simulation. |
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| 204 | |
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| 205 | <ltl_file> |
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| 206 | File containing LTL formulas to be model checked. |
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| 207 | |
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| 208 | Related "set" options: |
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| 209 | |
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| 210 | ltl_change_bracket <yes/no> |
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| 211 | Vl2mv automatically converts "[]" to "<>" in node names, |
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| 212 | therefore CTL* parser does the same thing. However, in some |
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| 213 | cases a user does not want to change node names in CTL* |
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| 214 | parsing. Then, use this set option by giving "no". Default is |
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| 215 | "yes". |
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| 216 | |
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| 217 | See also commands : model_check, approximate_model_check, |
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| 218 | incremental_ctl_verification |
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| 219 | __________________________________________________________ |
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| 220 | |
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| 221 | Last updated on 20050519 10h16 |
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| 222 | |
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| 223 | References |
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| 224 | |
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| 225 | 1. file://localhost/projects/development/hsv/vis/common/doc/html/init_verifyCmd.html |
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| 226 | 2. file://localhost/projects/development/hsv/vis/common/doc/ctl/ctl/ctl.html |
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| 227 | 3. file://localhost/projects/development/hsv/vis/common/doc/html/simulateCmd.html |
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| 228 | 4. file://localhost/projects/development/hsv/vis/common/doc/html/print_ardc_optionsCmd.html |
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