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2  ltl_model_check - perform LTL model checking on a flattened network
3     _________________________________________________________________
4
5   ltl_model_check  [-a  <ltl2aut_algorithm>]  [-b]  [-d <dbg_level>] [-f
6   <dbg_file>]    [-h]   [-i]   [-m]   [-s]   [-t   <time_out_period>][-v
7   <verbosity_level>]    [-A    <le_method>]    [-D    <dc_level>]    [-L
8   <lockstep_mode>] [-S <schedule>] [-F] [-X] [-Y] [-M] <ltl_file>
9
10   Performs  LTL  model  checking  on a flattened network. Before calling
11   this  command,  the user should have initialized the design by calling
12   the  command  [1]init_verify.  Regardless  of  the  options, no 'false
13   positives'  or 'false negatives' will occur: the result is correct for
14   the given circuit.
15
16   Properties  to  be  verified should be provided as LTL formulae in the
17   file  ltl_file.  Note  that  the  support of any wire referred to in a
18   formula  should consist only of latches. For the precise syntax of LTL
19   formulas, see the [2]VIS CTL and LTL syntax manual.
20
21   A  formula passes iff it is true for all initial states of the system.
22   Therefore,  in  the  presence of multiple initial states, if a formula
23   fails, the negation of the formula may also fail.
24
25   If  a  formula does not pass, a (potentially partial) proof of failure
26   (referred  to  as  a  debug  trace)  is  demonstrated.  Fair paths are
27   represented  by  a  finite  sequence of states (the stem) leading to a
28   fair  cycle, i.e. a cycle on which there is a state from each fairness
29   condition.  Whether  demostrate the proof or not can be specified (see
30   option -d).
31
32   Command options:
33
34   -a <ltl2aut_algorithm>
35          Specify  the  algorithm used in LTL formula -> Buechi automaton
36          translation.
37
38          ltl2aut_algorithm must be one of the following:
39
40          0: GPVW.
41
42          1: GPVW+.
43
44          2: LTL2AUT.
45
46          3: WRING (default).
47
48   -b
49          Use   boolean   minimization   during   the  LTL  to  Automaton
50          translation.
51
52   -d <dbg_level>
53          Specify  whether  to  demonstrate  a  counter-example  when the
54          system fails a formula being checked.
55
56          dbg_level must be one of the following:
57
58          0: No debugging performed. dbg_level=0 is the default.
59
60          1: Generate a counter-example (a path to a fair cycle).
61
62   -f <dbg_file>
63          Write the debugger output to dbg_file.
64
65   -h
66          Print the command usage.
67
68   -i
69          Print  input  values  causing transitions between states during
70          debugging. Both primary and pseudo inputs are printed.
71
72   -m
73          Pipe debugger output through the UNIX utility more.
74
75   -t <timeOutPeriod>
76          Specify  the  time  out  period  (in  seconds)  after which the
77          command aborts. By default this option is set to infinity.
78
79   -s
80          Print  debug  output  in the format accepted by the [3]simulate
81          command.
82
83   -v <verbosity_level>
84          Specify  verbosity  level.  This sets the amount of feedback on
85          CPU usage and code status.
86          verbosity_level must be one of the following:
87
88          0: No feedback provided. This is the default.
89
90          1: Feedback on code location.
91
92          2: Feedback on code location and CPU usage.
93
94   -A <le_method>
95          Specify  whether  the  compositional  SCC  analysis  algorithm,
96          Divide  and  Compose  (DnC),  is enabled for language emptiness
97          checking.  The  DnC  algorithm first enumerates fair SCCs in an
98          over-approximated abstract model, and then successively refines
99          them  in  the  more concrete models. Since non-fair SCCs can be
100          ignored  in  the more concrete models, a potentially large part
101          of   the  state  space  are  pruned  away  early  on  when  the
102          computations are cheap.
103
104          le_method must be one of the following:
105
106          0 : no use of Divide and Compose (Default).
107
108          1 : use Divide and Compose.
109
110   -D <dc_level>
111          Specify  extent  to which don't cares are used to simplify MDDs
112          in  model checking. Don't cares are minterms on which the value
113          taken   by   functions   does   not   affect  the  computation;
114          potentially,  these  minterms  can be used to simplify MDDs and
115          reduce the time taken to perform model checking.
116          dc_level must be one of the following:
117
118          0 : No don't cares are used.
119
120          1 : Use unreachable states as don't cares. This is the default.
121
122          2  :  Use  unreachable  states  as  don't  cares  and in the EU
123          computation, use 'frontiers' for image computation.
124
125          3  : First compute an overapproximation of the reachable states
126          (ARDC),  and  use  that  as  the cares set. Use `frontiers' for
127          image  computation.  For  help on controlling options for ARDC,
128          look  up  help  on the command: [4]print_ardc_options. Refer to
129          Moon,  Jang,  Somenzi,  Pixley, Yuan, "Approximate Reachability
130          Don't  Cares  for  {CTL}  Model  Checking", ICCAD98, and to two
131          papers  by Cho et al, IEEE TCAD December 1996: one is for State
132          Space  Decomposition  and  the  other  is  for  Approximate FSM
133          Traversal.
134
135   -S <schedule>
136          Specify  schedule  for  GSH  algorithm,  which  generalizes the
137          Emerson-Lei   algorithm   and   is  used  to  compute  greatest
138          fixpoints. The choice of schedule affects the sequence in which
139          EX  and  EU  operators  are applied. It makes a difference only
140          when fairness constraints are specified.
141          <schedule> must be one of the following:
142
143          EL  :  EU  and  EX  operators  strictly  alternate. This is the
144          default.
145
146          EL1 : EX is applied once for every application of all EUs.
147
148          EL2  :  EX  is applied repeatedly after each application of all
149          EUs.
150
151          budget : a hybrid of EL and EL2
152
153          random  :  enabled  operators  are  applied  in (pseudo-)random
154          order.
155
156          off  :  GSH is disabled, and the old algorithm is used instead.
157          The  old algorithm uses the EL , but the termination checks are
158          less sophisticated than in GSH.
159
160   -F
161          Use  forward  analysis  in  the  computation  of  the  greatest
162          fixpoint.  This  option is incompatible with -d 1 or higher and
163          can only be used with -D 1.
164
165   -L <lockstep_mode>
166          Use  the  lockstep  algorithm,  which  is  based  on  fair  SCC
167          enumeration.
168          <lockstep_mode> must be one of the following:
169
170          off  :  Lockstep  is  disabled.  This  is the default. Language
171          emptiness is checked by computing a hull of the fair SCCs.
172
173          on : Lockstep is enabled.
174
175          all : Lockstep is enabled; all fair SCCs are enumerated instead
176          of  terminating  as  soon  as one is found. This can be used to
177          study  the  SCCs  of a graph, but it is slower than the default
178          option.
179
180          n  : (n is a positive integer). Lockstep is enabled and up to n
181          fair SCCs are enumerated. This is less expensive than all , but
182          still less efficient than on , even when n = 1 .
183
184   -X
185          Disable  strength  reduction (use different decision procedures
186          for  strong,  weak, and terminal automaton). Strength reduction
187          is  the  default.  Refer  to  Bloem,  Ravi, Somenzi, "Efficient
188          Decision Procedures for LTL Model Checking," CAV99.
189
190   -Y
191          Disable  incremental  construction  of the partition for (MxA).
192          Instead,  build  a  new partition from the scratch. Incremental
193          construction of the partition is the default.
194
195   -Z
196          Add  arcs  into  the  Buechi  automaton  by  direct  simulation
197          relation,  to  heuristically  reduce  the  length  of  shortest
198          counter-example  in model checking. Refer to Awedh and Somenze,
199          "Proving More Properties with Bounded Model Checking," CAV04.
200
201   -M
202          Maximize   (adding  arcs  to)  Buechi  automaton  using  Direct
203          Simulation.
204
205   <ltl_file>
206          File containing LTL formulas to be model checked.
207
208   Related "set" options:
209
210   ltl_change_bracket <yes/no>
211          Vl2mv  automatically  converts  "[]"  to  "<>"  in  node names,
212          therefore  CTL*  parser  does  the same thing. However, in some
213          cases  a  user  does  not  want  to  change  node names in CTL*
214          parsing.  Then,  use this set option by giving "no". Default is
215          "yes".
216
217          See   also  commands  :  model_check,  approximate_model_check,
218          incremental_ctl_verification
219            __________________________________________________________
220
221          Last updated on 20050519 10h16
222
223References
224
225   1. file://localhost/projects/development/hsv/vis/common/doc/html/init_verifyCmd.html
226   2. file://localhost/projects/development/hsv/vis/common/doc/ctl/ctl/ctl.html
227   3. file://localhost/projects/development/hsv/vis/common/doc/html/simulateCmd.html
228   4. file://localhost/projects/development/hsv/vis/common/doc/html/print_ardc_optionsCmd.html
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