| 1 |  | 
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| 2 | ltl_to_aut - translate LTL formulae into Buechi automata | 
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| 3 | _________________________________________________________________ | 
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| 4 |  | 
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| 5 | ltl_to_aut  [-f  <ltl_file>]  [-m  <algorithm>] [-o <output_file>] [-t | 
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| 6 | <output_format>]  [-w]  [-b] [-p] [-d] [-r] [-i] [-M] [-v <verbosity>] | 
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| 7 | [-h] | 
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| 8 |  | 
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| 9 | Translate  the given LTL formulae into Buechi automata, and output the | 
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| 10 | automaton into a file. | 
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| 11 |  | 
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| 12 | The   translation   algorithms  are  the  same  as  the  one  used  in | 
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| 13 | [1]ltl_model_check . However, more flexible combination of the options | 
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| 14 | can be used with this command. | 
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| 15 |  | 
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| 16 | The  automaton can be displayed on the screen and written into a file. | 
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| 17 | The format of the output can be dot, blifmv, verilog and smv. | 
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| 18 |  | 
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| 19 | Command options: | 
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| 20 |  | 
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| 21 | -f <ltl_file> | 
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| 22 | The input file containing LTL formulae. | 
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| 23 |  | 
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| 24 | -m <algorithm> | 
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| 25 | Specify  the  algorithm used in LTL formula -> Buechi automaton | 
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| 26 | translation algorithm. | 
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| 27 |  | 
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| 28 | algorithm must be one of the following: | 
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| 29 |  | 
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| 30 | 0: GPVW. | 
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| 31 |  | 
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| 32 | 1: GPVW+. | 
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| 33 |  | 
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| 34 | 2: LTL2AUT. | 
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| 35 |  | 
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| 36 | 3: WRING (default). | 
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| 37 |  | 
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| 38 | -o <output_file> | 
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| 39 | Write the automata into this file. | 
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| 40 |  | 
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| 41 | -t <output_format> | 
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| 42 | Specify the output format of the automata. | 
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| 43 |  | 
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| 44 | output_format must be one of the following: | 
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| 45 |  | 
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| 46 | 0: dot. | 
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| 47 |  | 
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| 48 | 1: blif_mv. | 
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| 49 |  | 
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| 50 | 2: verilog. | 
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| 51 |  | 
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| 52 | 3: all of the formats above (default). | 
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| 53 |  | 
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| 54 | -w | 
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| 55 | Rewriting the formula before translation. | 
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| 56 |  | 
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| 57 | -b | 
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| 58 | Boolean minimization during the translation. | 
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| 59 |  | 
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| 60 | -p | 
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| 61 | Pruning the fair states in the Buechi automaton. | 
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| 62 |  | 
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| 63 | -d | 
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| 64 | Direct-simulation minimization of the Buechi automaton. | 
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| 65 |  | 
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| 66 | -r | 
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| 67 | Reverse-simulation minimization of the Buechi automaton. | 
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| 68 |  | 
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| 69 | -i | 
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| 70 | Minimization based ont the I/O structural information. | 
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| 71 |  | 
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| 72 | -M | 
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| 73 | Maximize   (adding  arcs  to)  Buechi  automaton  using  Direct | 
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| 74 | Simulation. | 
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| 75 |  | 
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| 76 | -v <verbosity_level> | 
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| 77 | Specify  verbosity  level.  It  must  be  one of the following: | 
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| 78 | 0,1,2,3. | 
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| 79 |  | 
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| 80 | -h | 
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| 81 | Print the command usage. | 
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| 82 | _________________________________________________________________ | 
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| 83 |  | 
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| 84 | Last updated on 20050519 10h16 | 
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| 85 |  | 
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| 86 | References | 
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| 87 |  | 
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| 88 | 1. file://localhost/projects/development/hsv/vis/common/doc/html/ltl_model_checkCmd.html | 
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