source: vis_dev/vis-2.3/models/transition/modele.v @ 104

Last change on this file since 104 was 99, checked in by cecile, 12 years ago

test for cex

File size: 408 bytes
Line 
1module simple(ck,i,t);
2input ck;
3input i;
4output t;
5
6wire nd_t;
7
8assign nd_t = $ND(0,1);
9
10reg [1:0]state;
11reg t;
12
13initial state = 0;
14initial t = $ND(0,1);
15
16always @(posedge ck)
17begin
18case (state)
19  0 :
20    begin
21      t = (i == 0)?nd_t:1;
22      state = (i == 0)?0:1;
23    end
24  1:
25    begin
26      t =nd_t;
27      state = 2;
28    end
29   2: begin
30      t = nd_t;
31      state = 2;
32    end
33endcase
34end
35
36endmodule
37
38
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