source: vis_dev/vis-2.3/src/rst/rst.c @ 84

Last change on this file since 84 was 14, checked in by cecile, 13 years ago

vis2.3
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[14]1/**CFile***********************************************************************
2
3  FileName    [rst.c]
4
5  PackageName [rst]
6
7  Synopsis    [utilities for restructuring hierarchy ]
8
9  Author      [Sriram Rajamani , with many thanks to Yuji Kuimoto]
10
11  Copyright   [Copyright (c) 1994-1996 The Regents of the Univ. of California.
12  All rights reserved.
13
14  Permission is hereby granted, without written agreement and without license
15  or royalty fees, to use, copy, modify, and distribute this software and its
16  documentation for any purpose, provided that the above copyright notice and
17  the following two paragraphs appear in all copies of this software.
18
19  IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
20  DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
21  OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
22  CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23
24  THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
25  INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
26  FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS ON AN
27  "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO PROVIDE
28  MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.]
29
30******************************************************************************/
31
32#include "rstInt.h"
33
34static char rcsid[] UNUSED = "$Id: rst.c,v 1.6 2005/04/16 07:33:12 fabio Exp $";
35
36/*---------------------------------------------------------------------------*/
37/* Constant declarations                                                     */
38/*---------------------------------------------------------------------------*/
39
40/*---------------------------------------------------------------------------*/
41/* Structure declarations                                                    */
42/*---------------------------------------------------------------------------*/
43
44/*---------------------------------------------------------------------------*/
45/* Type declarations                                                         */
46/*---------------------------------------------------------------------------*/
47
48/*---------------------------------------------------------------------------*/
49/* Variable declarations                                                     */
50/*---------------------------------------------------------------------------*/
51  int            verbose = 0;              /* default value */
52
53/*---------------------------------------------------------------------------*/
54/* Macro declarations                                                        */
55/*---------------------------------------------------------------------------*/
56
57/**AutomaticStart*************************************************************/
58
59/*---------------------------------------------------------------------------*/
60/* Static function prototypes                                                */
61/*---------------------------------------------------------------------------*/
62
63static int CommandCollapseChild(Hrc_Manager_t ** hmgr, int argc, char ** argv);
64
65/**AutomaticEnd***************************************************************/
66
67
68/*---------------------------------------------------------------------------*/
69/* Definition of exported functions                                          */
70/*---------------------------------------------------------------------------*/
71
72/**Function********************************************************************
73
74  Synopsis    [Initializes the test package.]
75
76  SideEffects []
77
78  SeeAlso     [Rst_End]
79
80******************************************************************************/
81void
82Rst_Init(void)
83{
84  /*
85   * Add a command to the global command table.  By using the leading
86   * underscore, the command will be listed under "help -a" but not "help".
87   */
88  Cmd_CommandAdd("collapse_child", CommandCollapseChild,
89                 /* doesn't changes_network */ 0);
90  Cmd_CommandAdd("decompose_child", Rst_CommandGroupComponents,
91                 /* doesn't changes_network */ 0);
92
93}
94
95
96/**Function********************************************************************
97
98  Synopsis    [Ends the test package.]
99
100  SideEffects []
101
102  SeeAlso     [Rst_Init]
103
104******************************************************************************/
105void
106Rst_End(void)
107{
108  /*
109   * For example, free any global memory (if any) which the test package is
110   * responsible for.
111   */
112}
113
114
115/*---------------------------------------------------------------------------*/
116/* Definition of internal functions                                          */
117/*---------------------------------------------------------------------------*/
118
119
120/*---------------------------------------------------------------------------*/
121/* Definition of static functions                                            */
122/*---------------------------------------------------------------------------*/
123
124/**Function********************************************************************
125
126  Synopsis    [Implements the collapse_child command.]
127
128  CommandName [collapse_child]
129
130  CommandSynopsis [Collapses a parent (which is the current node)
131and a given child node into the parent]
132
133  CommandArguments [\[-h\] \[-v\] <child_instance_name>]
134 
135  CommandDescription [This command collapses the given child into the current
136  node. After this command, the number of children of the
137  current node will decrease by one. The variables in
138  the child node will be renamed to reflect their
139  original name.  For example, if the
140  current node is named "foo" and it has two children,
141  "bar1" and "bar2", then after<p>
142
143        collapse_child bar1<p>
144
145  is executed, the name of any variable occuring in bar1,
146  say "xvar" will be renamed "bar1$xvar". The new parent
147  will have only the single child "bar2" (which can be
148  seen by typing "ls").
149  <p>
150
151  The user can use "cd" to traverse a hierarchy, go to a particular
152  node. When the user uses "write_blif" from a particular node, vis will write
153  the circuit in this node out. However, the user might want to do synthesis
154  on the entire circuit in the hierarchy. In that case, the hierarchy can be
155  collapsed into a single node, by repeatedly using this command. <p>
156
157  Examples:<p>
158    collapse_child P1<p>
159    Collapse P1 into the current node.<p>
160
161  Command options:<p> 
162  <dl>
163  <dt> -h
164  <dd> Print the command usage.
165  </dl>
166
167  <dt> -v
168  <dd> Verbose mode.
169  </dl>
170  ]
171
172  SideEffects []
173
174******************************************************************************/
175static int
176CommandCollapseChild(
177  Hrc_Manager_t ** hmgr,
178  int  argc,
179  char ** argv)
180{
181  int            c;
182  Hrc_Node_t  *parent, *child;
183  boolean retVal;
184
185  verbose = 0;
186 
187  /*
188   * Parse command line options.
189   */
190  util_getopt_reset();
191  while ((c = util_getopt(argc, argv, "vh")) != EOF) {
192    switch(c) {
193      case 'v':
194        verbose = 1;
195        break;
196      case 'h':
197        goto usage;
198      default:
199        goto usage;
200    }
201  }
202
203 
204  if(argc < 2){
205    goto usage;
206  }
207
208
209  parent =   Hrc_ManagerReadCurrentNode(*hmgr);
210  if (parent == NULL) {
211    fprintf(vis_stderr, "Can't find parent node \n");
212    return(1);
213  }
214
215  if (argc - util_optind == 0) {
216    (void) fprintf(vis_stderr, "Child node name not provided\n");
217    goto usage;
218  }
219  else if (argc - util_optind > 1) {
220    (void) fprintf(vis_stderr, "too many arguments\n");
221    goto usage;
222  }
223 
224
225  if(verbose)
226    (void)fprintf(vis_stdout, "Collapsing child : %s\n", argv[util_optind]);
227 
228  child =   Hrc_ManagerFindNodeByPathName(*hmgr, argv[util_optind],TRUE);
229  if (child == NULL) {
230    fprintf(vis_stderr, "Can't find child node %s\n", argv[util_optind]);
231    return(1);
232  } 
233
234  retVal = RstCollapseNode( *hmgr, parent, child);
235  return(retVal);
236 
237
238  usage:
239  (void) fprintf(vis_stdout,
240                 "The collapse_child command collapses the child node into the current node.\n");
241  (void) fprintf(vis_stderr,
242                 "usage: collapse_child [-h] [-v] <child instance name>\n");
243  (void) fprintf(vis_stderr, "   -h\t\tprint the command usage\n");
244  (void) fprintf(vis_stderr, "   -v\t\tverbose\n");
245  return 1;             /* error exit */
246}
247
248/**Function********************************************************************
249
250
251  Synopsis           [Given node1 and node2 where node1 is a parent of node2,
252                      this function collapses node2 into node1]
253
254  Description        [optional]
255
256  SideEffects        [node2 will be deleted from the hierarchy and banished into
257                      thin air. Current node will be set to new parent]
258
259  SeeAlso            [optional]
260
261******************************************************************************/
262
263int RstCollapseNode(
264  Hrc_Manager_t *hmgr,
265  Hrc_Node_t    *parent,
266  Hrc_Node_t    *child
267  )
268{
269  boolean foundChild;
270  st_generator *gen; /*XXX -  Do I need to initialize this */
271  char *curChildName, *newModelName, *parentModelName, *parentInstanceName, *suffixModelName;
272  Hrc_Node_t *curChild, *newNode, *root;
273  Hrc_Model_t *parentModelPtr, *childModelPtr, *newModelPtr;
274  array_t *actualInputArray, *actualOutputArray, *formalInputArray, *formalOutputArray;
275  st_table *parentVarTable, *childVarTable;
276  int i;
277  Var_Variable_t *var, *newVar;
278  boolean retVal;
279   
280  /* set current node to parent */
281  Hrc_ManagerSetCurrentNode(hmgr, parent);
282
283  /* get root node */
284  root = Hrc_ManagerReadRootNode(hmgr);
285 
286  /* check if the child is really our child */
287  foundChild = FALSE;
288  Hrc_NodeForEachChild ( parent, gen, curChildName, curChild){
289    if(curChild == child) foundChild = TRUE;
290  }
291
292  if(!foundChild) {
293      fprintf(vis_stdout, "Collapse called with bad child\n");
294      return(-1);
295  }
296
297  /* get masternodes for parent and child */
298  parentModelPtr     =
299      Hrc_ManagerFindModelByName(hmgr,Hrc_NodeReadModelName(parent));
300  assert(parentModelPtr != NULL);
301
302  childModelPtr     =
303      Hrc_ManagerFindModelByName(hmgr,Hrc_NodeReadModelName(child));
304  assert(childModelPtr != NULL);
305 
306
307  /* create a new model by concatenating names of parent and child */
308  suffixModelName = util_strcat3( Hrc_ModelReadName(parentModelPtr),
309                               "#",Hrc_ModelReadName(childModelPtr));
310  newModelName = util_strcat3( Hrc_NodeReadInstanceName(child),
311                               "#",suffixModelName);
312  FREE(suffixModelName);
313  assert(newModelName != 0);
314
315  newModelPtr = Hrc_ManagerFindModelByName(hmgr, newModelName);
316  if(newModelPtr != NULL){
317    fprintf(vis_stdout, "Warning: rst has detected an existing model with name %s\n",
318           newModelName);
319    fprintf(vis_stdout, "If you have collapsed another instance of this child model\n");
320    fprintf(vis_stdout, "into another instance of this parent previously this is \n");
321    fprintf(vis_stdout, "normal and collapse_child will function correctly.\n");
322    fprintf(vis_stdout, "Otherwise, you have a name conflict that rst cannot handle\n");
323  }
324  else {
325    newModelPtr = Hrc_ModelAlloc(hmgr, newModelName);
326   
327    if(verbose){
328      fprintf(vis_stdout, "Adding child components to new model\n");
329    }
330    childVarTable = RstAddChildComponentsToNewModel(hmgr,child, parent, newModelPtr);
331   
332    actualInputArray = Hrc_NodeReadActualInputs(child);
333    actualOutputArray = Hrc_NodeReadActualOutputs(child);
334    formalInputArray = Hrc_NodeReadFormalInputs(child);
335    formalOutputArray = Hrc_NodeReadFormalOutputs(child);
336   
337    assert(array_n(actualInputArray) == array_n(formalInputArray));
338    assert(array_n(actualOutputArray) == array_n(formalOutputArray));
339   
340    parentVarTable =  st_init_table(st_ptrcmp,st_ptrhash);
341   
342    for (  i = 0; i < array_n(formalInputArray); i++) {
343      /* get the modified child var */
344      var = array_fetch(Var_Variable_t *, formalInputArray, i);
345      retVal = st_lookup(childVarTable, (char *)var, &newVar);
346      assert(retVal);
347      var = array_fetch(Var_Variable_t *, actualInputArray, i);
348      st_insert(parentVarTable, (char *) var, (char *) newVar);
349    }
350   
351    for (  i = 0; i < array_n(formalOutputArray); i++) {
352      /* get the modified child var */
353      var  = array_fetch(Var_Variable_t *, formalOutputArray, i);
354      retVal = st_lookup(childVarTable, (char *)var, &newVar);
355      assert(retVal);
356      var = array_fetch(Var_Variable_t *, actualOutputArray, i);
357      st_insert(parentVarTable, (char *) var, (char *) newVar);
358    }
359   
360    if(verbose){
361      fprintf(vis_stdout, "Adding parent components to new model\n");
362    }
363   
364    RstAddParentComponentsToNewModel(hmgr, parent, newModelPtr,
365                                     parentVarTable, child);
366    st_free_table(childVarTable);
367    st_free_table(parentVarTable);
368  }
369 
370  if(verbose)
371    fprintf(vis_stdout, "Creating new model hierarchy.\n");
372
373  parentInstanceName = Hrc_NodeReadInstanceName(parent);
374  if(verbose)
375    fprintf(vis_stdout, "Retaining old parent's instance name %s\n",
376            parentInstanceName);
377   
378    newNode = Hrc_ModelCreateHierarchy(hmgr, newModelPtr,parentInstanceName);
379                                     
380 
381  if(verbose)
382    fprintf(vis_stdout, "Replacing old hierarchy tree with new tree.\n");
383  retVal = Hrc_TreeReplace(parent,newNode);
384  assert(retVal);
385
386  Hrc_ManagerSetCurrentNode(hmgr,newNode);
387
388  if(root == parent){
389    if(verbose){
390      fprintf(vis_stdout, "Current parent IS the root...\n");
391      fprintf(vis_stdout, "Deleting old root model\n");
392    }
393   
394    parentModelName =  util_strsav(Hrc_ModelReadName(parentModelPtr));
395    Hrc_ModelDelete(hmgr, parentModelName);
396    FREE(parentModelName);
397  }
398 
399 
400  FREE(newModelName);
401  return(0);
402}
403
404/**Function********************************************************************
405
406
407  Synopsis           [Add Child's components - latches,tables,vars to new model]
408
409  Description        [optional]
410
411  SideEffects        [none]
412
413  SeeAlso            [optional]
414
415******************************************************************************/
416
417st_table * RstAddChildComponentsToNewModel(
418  Hrc_Manager_t *hmgr,
419  Hrc_Node_t    *child,
420  Hrc_Node_t    *parent,
421  Hrc_Model_t   *newModelPtr
422  )
423{
424  Hrc_Node_t *newMaster, *grandChild;
425  st_generator *gen; 
426  int i,index;
427  Tbl_Table_t *tbl,*newTbl, *resetTbl, *newResetTbl;
428  Var_Variable_t *var, *newVar ,  *newLatchInput, *newLatchOutput, *parentVar;
429  char *latchName, *varName, *newVarName, *grandChildInstName, *newSubcktName;
430  Hrc_Latch_t *latch, *newLatch;
431  st_table *childVarToNewVar;
432  array_t *actualInputArray, *newActualInputArray;
433  array_t *actualOutputArray, *newActualOutputArray;
434  boolean retVal;
435
436  newMaster = Hrc_ModelReadMasterNode(newModelPtr);
437 
438  childVarToNewVar = st_init_table(st_ptrcmp,st_ptrhash);
439  /* Add all Child's variables to the new model after prefixing child name */
440  Hrc_NodeForEachVariable(child, gen, varName, var){
441    if( Var_VariableTestIsPI(var) || Var_VariableTestIsPO(var)){
442      parentVar = Hrc_VariableFindActualFromFormal(child, var, parent);
443      assert(parentVar != NULL);
444      newVarName = util_strsav(Var_VariableReadName(parentVar));
445      assert(newVarName != NULL);
446    }
447    else{
448    newVarName = util_strcat3(Hrc_NodeReadInstanceName(child), "$",
449                              Var_VariableReadName(var));
450    assert(newVarName != NULL);
451    }
452
453    newVar = Hrc_NodeFindVariableByName(newMaster, newVarName);
454    if (newVar != NULL){
455      assert (Var_VariableTestIsPI(var) || Var_VariableTestIsPO(var));
456    }
457
458    if(newVar == NULL)
459      {
460        newVar = Var_VariableDup(var,newMaster);
461        retVal = Var_VariableChangeName(newVar,newVarName);
462        assert(retVal);
463        Var_VariableResetAllTypes(newVar);
464      }
465   
466    FREE(newVarName);
467    st_insert(childVarToNewVar, (char *)var, (char *)newVar);
468  }
469
470  /* Add all Child's tables to new model */
471  Hrc_NodeForEachNameTable(child, i, tbl){
472    /* copy the table */
473    newTbl = Tbl_TableHardDup(tbl);
474
475    /* Muck with its vars */
476    Tbl_TableForEachInputVar(newTbl, index, var){
477      retVal = st_lookup(childVarToNewVar, (char *)var, &newVar);
478      assert(retVal);
479      Tbl_TableSubstituteVar(newTbl,var,newVar);
480    }
481    Tbl_TableForEachOutputVar(newTbl, index, var){
482      retVal = st_lookup(childVarToNewVar, (char *)var, &newVar);
483      assert(retVal);
484      Tbl_TableSubstituteVar(newTbl,var,newVar);
485    }
486
487    /* add it in! */
488    Hrc_NodeAddNameTable(newMaster, newTbl);
489  }
490
491  /* Add all Child's latches to the new model */
492  Hrc_NodeForEachLatch( child, gen, latchName, latch){
493
494    /* muck with the variables */
495    retVal = st_lookup(childVarToNewVar, (char *)Hrc_LatchReadInput(latch),
496                       &(newLatchInput));
497    assert(retVal);
498    Var_VariableSetNS(newLatchInput);
499    retVal = st_lookup(childVarToNewVar, (char *)Hrc_LatchReadOutput(latch),
500                       &(newLatchOutput));
501    Var_VariableSetPS(newLatchOutput);
502    assert(retVal);
503
504    /* get new latch */
505    newLatch = Hrc_LatchCreate(newModelPtr, newLatchInput, newLatchOutput);
506    assert(newLatch != NULL);
507
508    /* copy reset table */
509    resetTbl = Hrc_LatchReadResetTable(latch);
510    assert(resetTbl != NULL);
511    newResetTbl = Tbl_TableSoftDup(resetTbl);
512   
513    /* muck with reset table vars */
514    Tbl_TableForEachInputVar(newResetTbl, index, var){
515      retVal = st_lookup(childVarToNewVar, (char *)var, &newVar);
516      assert(retVal);
517      Tbl_TableSubstituteVar(newResetTbl,var,newVar);
518    }
519    Tbl_TableForEachOutputVar(newResetTbl, index, var){
520      retVal = st_lookup(childVarToNewVar, (char *)var, &newVar);
521      assert(retVal);
522      Tbl_TableSubstituteVar(newResetTbl,var,newVar);
523    }
524
525    /* Add table to latch */
526    retVal = Hrc_LatchSetResetTable(newLatch,newResetTbl);
527    assert(retVal);
528   
529    /* add it in! */
530    Hrc_NodeAddLatch(newMaster, newLatch);
531  }
532
533  /* add all Child's sub circuits  to master */
534  Hrc_NodeForEachChild(child, gen, grandChildInstName, grandChild) {
535
536    actualInputArray = Hrc_NodeReadActualInputs(grandChild);
537    actualOutputArray = Hrc_NodeReadActualOutputs(grandChild);
538
539    newActualInputArray = array_alloc(Var_Variable_t *, 0);
540    newActualOutputArray = array_alloc(Var_Variable_t *, 0);
541
542    /* same story - var mucking */
543    for ( i = 0; i < array_n(actualInputArray); i++){
544      var = array_fetch(Var_Variable_t *, actualInputArray, i);
545      assert(var != NULL);
546      retVal = st_lookup(childVarToNewVar, (char *)var, &newVar);
547      assert(retVal);
548      Var_VariableSetSI(newVar);
549      array_insert_last(Var_Variable_t *, newActualInputArray, newVar);
550    }
551
552    for ( i = 0; i < array_n(actualOutputArray); i++){
553      var = array_fetch(Var_Variable_t *, actualOutputArray, i);
554      assert(var != NULL);
555      retVal = st_lookup(childVarToNewVar, (char *)var, &newVar);
556      assert(retVal);
557      Var_VariableSetSO(newVar);
558      array_insert_last(Var_Variable_t *, newActualOutputArray, newVar);
559    }
560
561   
562    /* add subcircuit to model */
563    newSubcktName = util_strcat3(Hrc_NodeReadInstanceName(child), "$",
564                                 Hrc_NodeReadInstanceName(grandChild));
565    Hrc_ModelAddSubckt(newModelPtr,
566                       Hrc_ManagerFindModelByName(hmgr,Hrc_NodeReadModelName(grandChild)),
567                       newSubcktName,
568                       newActualInputArray, newActualOutputArray);
569    FREE(newSubcktName);
570  }
571
572  return(childVarToNewVar);
573}
574/**Function********************************************************************
575
576
577  Synopsis           [Add parents componets to new model]
578
579  Description        [optional]
580
581  SideEffects        [none]
582
583  SeeAlso            [optional]
584
585******************************************************************************/
586
587
588int RstAddParentComponentsToNewModel(
589  Hrc_Manager_t *hmgr,
590  Hrc_Node_t   *parent,
591  Hrc_Model_t   *newModelPtr,
592  st_table      *parentVarTable,
593  Hrc_Node_t   *child
594  )
595{
596  Hrc_Node_t *newMaster, *curChild;
597  st_generator *gen; 
598  int i,index;
599
600  Tbl_Table_t *tbl,*newTbl, *resetTbl, *newResetTbl;
601  Var_Variable_t *var, *newVar ,  *newLatchInput, *newLatchOutput ;
602  char *latchName, *varName, *curChildInstName;
603  Hrc_Latch_t *latch, *newLatch;
604  array_t *actualInputArray, *newActualInputArray;
605  array_t *actualOutputArray, *newActualOutputArray;
606  int pFanout;
607  boolean retVal;
608
609  newMaster = Hrc_ModelReadMasterNode(newModelPtr);
610
611  /* Add all Parent's variables to the new model.
612     If a parent variable is an interface to the child, it
613     will change and get merged with the child's correspoinding
614     interface variable */
615 
616  Hrc_NodeForEachVariable(parent, gen, varName, var){
617    if(st_lookup(parentVarTable, (char *) var, &newVar) == 0){
618      /* not an interface to child - copy it */
619      newVar = Var_VariableDup(var,newMaster);
620      assert(newVar != NULL);
621      Var_VariableResetAllTypes(newVar);
622      st_insert(parentVarTable, (char *)var, (char *)newVar);
623    }
624    else {
625      /* interface variable. Have to increment the number of
626         fanouts */
627      pFanout = Var_VariableReadNumFanoutTables(var);
628      while(pFanout){
629        Var_VariableIncrementNumFanoutTables(newVar);
630        pFanout--;
631      }
632    }
633  }
634 
635
636  /* Add all Parent's tables to new model */
637  Hrc_NodeForEachNameTable(parent, i, tbl){
638    /* copy the table */
639    newTbl = Tbl_TableHardDup(tbl);
640    /* Muck with its vars */
641    Tbl_TableForEachInputVar(newTbl, index, var){
642      retVal = st_lookup(parentVarTable, (char *)var, &newVar);
643      assert(retVal);
644      Tbl_TableSubstituteVar(newTbl,var,newVar);
645    }
646
647    Tbl_TableForEachOutputVar(newTbl, index, var){
648      retVal = st_lookup(parentVarTable, (char *)var, &newVar);
649      assert(retVal);
650      Tbl_TableSubstituteVar(newTbl,var,newVar);
651    }
652
653    /* add it in! */
654    Hrc_NodeAddNameTable(newMaster, newTbl);
655  }
656
657  /* Add all Parent's latches to the new model */
658  Hrc_NodeForEachLatch( parent, gen, latchName, latch){
659    /* muck with the variables */
660    retVal = st_lookup(parentVarTable, (char *)Hrc_LatchReadInput(latch),
661                       &(newLatchInput));
662    assert(retVal);
663    Var_VariableSetNS(newLatchInput);
664    retVal = st_lookup(parentVarTable, (char *)Hrc_LatchReadOutput(latch),
665                       &(newLatchOutput));
666    assert(retVal);
667    Var_VariableSetPS(newLatchOutput);
668
669    /* get new latch */
670    newLatch = Hrc_LatchCreate(newModelPtr, newLatchInput, newLatchOutput);
671    assert(newLatch != NULL);
672
673    /* copy reset table */
674    resetTbl = Hrc_LatchReadResetTable(latch);
675    assert(resetTbl != NULL);
676    newResetTbl = Tbl_TableSoftDup(resetTbl);
677   
678    /* muck with reset table vars */
679    Tbl_TableForEachInputVar(newResetTbl, index, var){
680      retVal = st_lookup(parentVarTable, (char *)var, &newVar);
681      assert(retVal);
682      Tbl_TableSubstituteVar(newResetTbl,var,newVar);
683    }
684    Tbl_TableForEachOutputVar(newResetTbl, index, var){
685      retVal = st_lookup(parentVarTable, (char *)var, &newVar);
686      assert(retVal);
687      Tbl_TableSubstituteVar(newResetTbl,var,newVar);
688    }
689
690    /* add table to latch */
691    retVal = Hrc_LatchSetResetTable(newLatch,newResetTbl);
692    assert(retVal);
693   
694    /* add it in! */
695    Hrc_NodeAddLatch(newMaster, newLatch);
696  }
697
698  /* add all Parent's sub circuits  to master except "the" child's */
699  Hrc_NodeForEachChild(parent, gen, curChildInstName, curChild) {
700    /* do nothing for "the" child */
701    if(curChild == child){
702      continue;
703    }
704    actualInputArray = Hrc_NodeReadActualInputs(curChild);
705    actualOutputArray = Hrc_NodeReadActualOutputs(curChild);
706
707    newActualInputArray = array_alloc(Var_Variable_t *, 0);
708    newActualOutputArray = array_alloc(Var_Variable_t *, 0);
709
710    /* same story - var mucking */
711    for ( i = 0; i < array_n(actualInputArray); i++){
712      var = array_fetch(Var_Variable_t *, actualInputArray, i);
713      retVal = st_lookup(parentVarTable, (char *)var, &newVar);
714      assert(retVal);
715      Var_VariableSetSI(newVar);
716      array_insert_last(Var_Variable_t *, newActualInputArray, newVar);
717    }
718
719    for ( i = 0; i < array_n(actualOutputArray); i++){
720      var = array_fetch(Var_Variable_t *, actualOutputArray, i);
721      retVal = st_lookup(parentVarTable, (char *)var, &newVar);
722      assert(retVal);
723      Var_VariableSetSO(newVar);
724      array_insert_last(Var_Variable_t *, newActualOutputArray, newVar);
725    }
726
727    /* add subcircuit to model */
728    Hrc_ModelAddSubckt(newModelPtr,
729                       Hrc_ManagerFindModelByName(hmgr,Hrc_NodeReadModelName(curChild)),
730                       Hrc_NodeReadInstanceName(curChild),
731                       newActualInputArray, newActualOutputArray);
732  }
733
734  /* add all formal inputs */
735  Hrc_NodeForEachFormalInput( parent, i, var){
736      retVal = st_lookup(parentVarTable, (char *)var, &newVar);
737      assert(retVal);
738      retVal = Hrc_NodeAddFormalInput(newMaster, newVar);
739      Var_VariableSetPI(newVar);
740      assert(retVal);
741  }
742
743  /* add all formal outputs */ 
744  Hrc_NodeForEachFormalOutput( parent, i, var){
745      retVal = st_lookup(parentVarTable, (char *)var, &newVar);
746      assert(retVal);
747      retVal = Hrc_NodeAddFormalOutput(newMaster, newVar);
748      Var_VariableSetPO(newVar);
749      assert(retVal);
750  }
751
752  return(0);
753}
754
755#ifdef COLLAPSE_DEBUG
756int printVarTable( st_table *varTable)
757{
758  st_generator *gen;
759  Var_Variable_t *var, *newVar;
760 
761  st_foreach_item( varTable, gen, (char **) &var, (char **)&newVar){
762    printf("address: %u : %15s -> %15s \n", (unsigned)var, Var_VariableReadName(var),
763           Var_VariableReadName(newVar));
764  }
765
766  return(0);
767}
768#endif
769
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