# /tmp/yuji/next/vl2mv/snake/bin/vl2mv eisenberg.v # version: 0.2 # date: 14:23:49 12/19/95 (PST) .model system # I/O ports .mv out_flag1 3 idle want_in in_cs .mv flag1 3 idle want_in in_cs .mv flag0 3 idle want_in in_cs .mv out_flag0 3 idle want_in in_cs .names _n0 0 .subckt process p0 perm=perm0 flag0=flag0 flag1=flag1 out_flag=out_flag0 turn=turn out_turn=out_turn0 i=_n0 .names _n1 1 .subckt process p1 perm=perm1 flag0=flag0 flag1=flag1 out_flag=out_flag1 turn=turn out_turn=out_turn1 i=_n1 # assign perm0 = $NDset ( ,0,1 ) .names perm0 0 1 # assign perm1 = ~perm0 .names perm0 _n5 0 1 1 0 .names _n5 perm1$raw_n4 - =_n5 # flag0 = 0 .mv flag0$raw_n6 3 idle want_in in_cs .names flag0$raw_n6 idle # flag1 = 0 .mv flag1$raw_n7 3 idle want_in in_cs .names flag1$raw_n7 idle # turn = 0 .names turn$raw_n8 0 # non-blocking assignments for initial # st_perm0 = $NDset ( 0,1 ) .names st_perm0$raw_n9$initial$_na 0 1 .names st_perm0$raw_n9$initial$_na st_perm0$raw_n9 - =st_perm0$raw_n9$initial$_na # non-blocking assignments for initial # st_perm1 = $NDset ( 0,1 ) .names st_perm1$raw_nb$initial$_nc 0 1 .names st_perm1$raw_nb$initial$_nc st_perm1$raw_nb - =st_perm1$raw_nb$initial$_nc # non-blocking assignments for initial # st_perm0 = perm0 .names perm0 st_perm0$raw_nd - =perm0 # st_perm1 = perm1 .names perm1 st_perm1$raw_ne - =perm1 .names _n10 1 # perm0 == 1 .names perm0 _n10 _n11 .def 0 0 1 1 1 0 1 .names _n11 _nf 0 1 1 0 .names _nf _n13 - =_nf # flag0 = out_flag0 .mv flag0$_nf_n14$true 3 idle want_in in_cs .names out_flag0 flag0$_nf_n14$true - =out_flag0 # turn = out_turn0 .names out_turn0 turn$_nf_n15$true - =out_turn0 .names _n17 1 # perm1 == 1 .names perm1 _n17 _n18 .def 0 0 1 1 1 0 1 .names _n18 _n16 0 1 1 0 .names _n16 _n1a - =_n16 # flag1 = out_flag1 .mv flag1$_n16_n1b$true 3 idle want_in in_cs .names out_flag1 flag1$_n16_n1b$true - =out_flag1 # turn = out_turn1 .names out_turn1 turn$_n16_n1c$true - =out_turn1 # if/else (perm1 == 1) .names turn$_n16_n1c$true turn _n16 turn$_n16$raw_n25 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv flag1$_n16$raw_n27 3 idle want_in in_cs .names flag1$_n16_n1b$true flag1 _n16 flag1$_n16$raw_n27 - - 0 =flag1 - - 1 =flag1$_n16_n1b$true # if/else (perm0 == 1) .names turn$_nf_n15$true turn$_n16$raw_n25 _nf turn$_nf$raw_n30 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv flag0$_nf$raw_n36 3 idle want_in in_cs .names flag0$_nf_n14$true flag0 _nf flag0$_nf$raw_n36 - - 0 =flag0 - - 1 =flag0$_nf_n14$true .mv flag1$_nf$raw_n3a 3 idle want_in in_cs .names flag1 flag1$_n16$raw_n27 _nf flag1$_nf$raw_n3a - - 0 =flag1$_n16$raw_n27 - - 1 =flag1 # conflict arbitrators .names _n13 _n1a _n3d .def 0 1 - 1 0 1 1 .names _n3d turn$_nf$raw_n30 turn _n3e 1 0 - 0 1 1 - 1 0 - 0 0 0 - 1 1 .names perm1$raw_n4 perm1 0 0 1 1 .names _n13 _n1a _n3f .def 0 0 1 1 .mv _n40 3 idle want_in in_cs .names _n3f flag1$_nf$raw_n3a flag1 _n40 1 - - =flag1$_nf$raw_n3a 0 - - =flag1 .names _n13 _n46 .def 0 1 1 .mv _n47 3 idle want_in in_cs .names _n46 flag0$_nf$raw_n36 flag0 _n47 1 - - =flag0$_nf$raw_n36 0 - - =flag0 .names _n4d .def 0 1 .names _n4d st_perm1$raw_ne _n4e .def 0 1 0 0 1 1 1 .names _n4f .def 0 1 .names _n4f st_perm0$raw_nd _n50 .def 0 1 0 0 1 1 1 # non-blocking assignments # latches .r turn$raw_n8 turn 0 0 1 1 .latch _n3e turn .r flag1$raw_n7 flag1 - =flag1$raw_n7 .latch _n40 flag1 .r flag0$raw_n6 flag0 - =flag0$raw_n6 .latch _n47 flag0 .r st_perm1$raw_nb st_perm1 0 0 1 1 .latch _n4e st_perm1 .r st_perm0$raw_n9 st_perm0 0 0 1 1 .latch _n50 st_perm0 # quasi-continuous assignment .end .model process # I/O ports .inputs turn .outputs out_turn .outputs out_flag .inputs flag1 .inputs flag0 .inputs i .inputs perm .mv flagturn 3 idle want_in in_cs .mv flagj 3 idle want_in in_cs .mv pc 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .mv out_flag 3 idle want_in in_cs .mv flag1 3 idle want_in in_cs .mv flag0 3 idle want_in in_cs # assign flagj = (j == 0) ? flag0 : flag1 .mv flagj$raw_n51 3 idle want_in in_cs .names _n53 0 # j == 0 .names j _n53 _n54 .def 0 0 1 1 1 0 1 .names _n54 _n52 0 1 1 0 # (j == 0) ? flag0 : flag1 .mv _n56 3 idle want_in in_cs .names flag0 flag1 _n52 _n56 - - 0 =flag1 - - 1 =flag0 .names _n56 flagj$raw_n51 - =_n56 # assign flagturn = (turn == 0) ? flag0 : flag1 .mv flagturn$raw_n57 3 idle want_in in_cs .names _n59 0 # turn == 0 .names turn _n59 _n5a .def 0 0 1 1 1 0 1 .names _n5a _n58 0 1 1 0 # (turn == 0) ? flag0 : flag1 .mv _n5c 3 idle want_in in_cs .names flag0 flag1 _n58 _n5c - - 0 =flag1 - - 1 =flag0 .names _n5c flagturn$raw_n57 - =_n5c # assign out_flag = (pc == L1 ) ? 1 : (pc == L7 ) ? 2 : (pc == L16 ) ? 0 : (i == 0) ? flag0 : flag1 .mv out_flag$raw_n5d 3 idle want_in in_cs .mv _n5f 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n5f L1 # pc == 0 .names pc _n5f _n5e .def 0 - =pc 1 .mv _n61 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n61 L7 # pc == 6 .names pc _n61 _n60 .def 0 - =pc 1 .mv _n63 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n63 L16 # pc == 15 .names pc _n63 _n62 .def 0 - =pc 1 .names _n65 0 # i == 0 .names i _n65 _n66 .def 0 0 1 1 1 0 1 .names _n66 _n64 0 1 1 0 # (i == 0) ? flag0 : flag1 .mv _n68 3 idle want_in in_cs .names flag0 flag1 _n64 _n68 - - 0 =flag1 - - 1 =flag0 .mv _n69 3 idle want_in in_cs .names _n69 idle # (pc == 15) ? 0 : (i == 0) ? flag0 : flag1 .mv _n6a 3 idle want_in in_cs .names _n69 _n68 _n62 _n6a - - 0 =_n68 - - 1 =_n69 .mv _n6b 3 idle want_in in_cs .names _n6b in_cs # (pc == 6) ? 2 : (pc == 15) ? 0 : (i == 0) ? flag0 : flag1 .mv _n6c 3 idle want_in in_cs .names _n6b _n6a _n60 _n6c - - 0 =_n6a - - 1 =_n6b .mv _n6d 3 idle want_in in_cs .names _n6d want_in # (pc == 0) ? 1 : (pc == 6) ? 2 : (pc == 15) ? 0 : (i == 0) ? flag0 : flag1 .mv _n6e 3 idle want_in in_cs .names _n6d _n6c _n5e _n6e - - 0 =_n6c - - 1 =_n6d .names _n6e out_flag$raw_n5d - =_n6e # assign out_turn = (pc == L11 ) ? i : (pc == L15 ) ? j : turn .mv _n71 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n71 L11 # pc == 10 .names pc _n71 _n70 .def 0 - =pc 1 .mv _n73 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n73 L15 # pc == 14 .names pc _n73 _n72 .def 0 - =pc 1 # (pc == 14) ? j : turn .names j turn _n72 _n74 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 # (pc == 10) ? i : (pc == 14) ? j : turn .names i _n74 _n70 _n76 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .names _n76 out_turn$raw_n6f - =_n76 # assign nond_exit = $NDset ( ,0,1 ) .names nond_exit 0 1 # j = 0 .names j$raw_n7a 0 # pc = 0 .mv pc$raw_n7b 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$raw_n7b L1 # non-blocking assignments for initial .names _n7d 1 # perm == 1 .names perm _n7d _n7e .def 0 0 1 1 1 0 1 .names _n7e _n7c 0 1 1 0 .names _n7c _n80 - =_n7c .mv _n83 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n83 L1 .names pc _n83 _n82 .def 0 - =pc 1 .names _n82 _n81 1 1 0 0 # pc = 1 .mv pc$_n81_n84$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n81_n84$true L2 .mv _n87 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n87 L2 .names pc _n87 _n86 .def 0 - =pc 1 .names _n86 _n85 1 1 0 0 # j = turn .names turn j$_n85_n88$true - =turn # pc = 2 .mv pc$_n85_n89$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n85_n89$true L3 .mv _n8c 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n8c L3 .names pc _n8c _n8b .def 0 - =pc 1 .names _n8b _n8a 1 1 0 0 # j != i .names j i _n8e .def 0 0 1 1 1 0 1 .names _n8e _n8d - =_n8e .names _n8d _n90 - =_n8d # pc = 3 .mv pc$_n8d_n91$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n8d_n91$true L4 # pc = 6 .mv pc$_n8d_n92$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n8d_n92$false L7 # if/else (j != i ) .mv pc$_n8d$raw_n94 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n8d_n91$true pc$_n8d_n92$false _n8d pc$_n8d$raw_n94 - - 0 =pc$_n8d_n92$false - - 1 =pc$_n8d_n91$true .mv _n99 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n99 L4 .names pc _n99 _n98 .def 0 - =pc 1 .names _n98 _n97 1 1 0 0 .mv _n9b 3 idle want_in in_cs .names _n9b idle # flagj != 0 .names flagj _n9b _n9a .def 1 - =flagj 0 .names _n9a _n9c - =_n9a # pc = 4 .mv pc$_n9a_n9d$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n9a_n9d$true L5 # pc = 5 .mv pc$_n9a_n9e$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n9a_n9e$false L6 # if/else (flagj != 0) .mv pc$_n9a$raw_na0 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n9a_n9d$true pc$_n9a_n9e$false _n9a pc$_n9a$raw_na0 - - 0 =pc$_n9a_n9e$false - - 1 =pc$_n9a_n9d$true .mv _na5 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _na5 L5 .names pc _na5 _na4 .def 0 - =pc 1 .names _na4 _na3 1 1 0 0 # j = turn .names turn j$_na3_na6$true - =turn # pc = 2 .mv pc$_na3_na7$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_na3_na7$true L3 .mv _naa 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _naa L6 .names pc _naa _na9 .def 0 - =pc 1 .names _na9 _na8 1 1 0 0 .names _nac<0> 0 .names _nac<1> 1 .names _nad<0> 1 .names _nad<1> 0 # 2 - 1 .names _naf 0 .names _nac<0> _nad<0> _naf _nae<0> .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _nb1 0 .names _nac<0> _nad<0> _nb1 _nb0 .def 0 0 0 1 1 0 1 0 1 0 1 1 1 1 1 1 1 .names _nac<1> _nad<1> _nb0 _nae<1> .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # j == 2 - 1 .names j _nae<0> _nb2<0> .def 0 0 1 1 1 0 1 .names _nae<1> _nb2<1> - =_nae<1> .names _nb2<0> _nb2<1> _nb3 .def 1 0 0 0 .names _nb3 _nab 0 1 1 0 .names _nab _nb4 - =_nab # j = 0 .names j$_nab_nb5$true 0 # j = j + 1 .names _nb7 1 # j + 1 .names _nb9 0 .names j _nb7 _nb9 _nb8 .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _nbb 0 .names j _nb7 _nbb _nba .def 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 .names _nb8 j$_nab_nb6$false - =_nb8 # if/else (j == 2 - 1) .names j$_nab_nb5$true j$_nab_nb6$false _nab j$_nab$raw_nbd 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 # pc = 2 .mv pc$_na8_nc1$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_na8_nc1$true L3 .mv _nc4 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _nc4 L7 .names pc _nc4 _nc3 .def 0 - =pc 1 .names _nc3 _nc2 1 1 0 0 # pc = 7 .mv pc$_nc2_nc5$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_nc2_nc5$true L8 .mv _nc8 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _nc8 L8 .names pc _nc8 _nc7 .def 0 - =pc 1 .names _nc7 _nc6 1 1 0 0 # j = 0 .names j$_nc6_nc9$true 0 # pc = 8 .mv pc$_nc6_nca$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_nc6_nca$true L9 .mv _ncd 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _ncd L9 .names pc _ncd _ncc .def 0 - =pc 1 .names _ncc _ncb 1 1 0 0 .names _nce 0 # j < 2 .names _nd1 0 .names j _nce _nd1 _nd0 .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _nd3 0 .names j _nce _nd3 _nd2 .def 0 0 0 1 1 0 1 0 1 0 1 1 1 1 1 1 1 .names _nd0 _nd4 - =_nd0 .names _nd2 _nd4 _ncf .def 0 1 1 1 # j == i .names j i _nd6 .def 0 0 1 1 1 0 1 .names _nd6 _nd5 0 1 1 0 .mv _nd9 3 idle want_in in_cs .names _nd9 in_cs # flagj != 2 .names flagj _nd9 _nd8 .def 1 - =flagj 0 # (j == i ) || (flagj != 2) .names _nd5 _nd8 _nda .def 1 0 0 0 # (j < 2) && ((j == i ) || (flagj != 2)) .names _ncf _nda _ndb .def 0 1 1 1 .names _ndb _ndc - =_ndb # j = j + 1 .names _nde 1 # j + 1 .names _ne0 0 .names j _nde _ne0 _ndf .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _ne2 0 .names j _nde _ne2 _ne1 .def 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 .names _ndf j$_ndb_ndd$true - =_ndf # pc = 8 .mv pc$_ndb_ne3$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_ndb_ne3$true L9 # pc = 9 .mv pc$_ndb_ne4$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_ndb_ne4$false L10 # if/else ((j < 2) && ((j == i ) || (flagj != 2))) .mv pc$_ndb$raw_ne7 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_ndb_ne3$true pc$_ndb_ne4$false _ndb pc$_ndb$raw_ne7 - - 0 =pc$_ndb_ne4$false - - 1 =pc$_ndb_ne3$true .names j$_ndb_ndd$true j _ndb j$_ndb$raw_nea 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv _nef 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _nef L10 .names pc _nef _nee .def 0 - =pc 1 .names _nee _ned 1 1 0 0 .names _nf0 0 # j >= 2 .names _nf3 0 .names j _nf0 _nf3 _nf2 .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _nf5 0 .names j _nf0 _nf5 _nf4 .def 0 0 0 1 1 0 1 0 1 0 1 1 1 1 1 1 1 .names _nf2 _nf6 - =_nf2 .names _nf4 _nf6 _nf7 .def 0 1 1 1 .names _nf7 _nf1 0 1 1 0 # turn == i .names turn i _nf9 .def 0 0 1 1 1 0 1 .names _nf9 _nf8 0 1 1 0 .mv _nfc 3 idle want_in in_cs .names _nfc idle # flagturn == 0 .names flagturn _nfc _nfb .def 0 - =flagturn 1 # (turn == i ) || (flagturn == 0) .names _nf8 _nfb _nfd .def 1 0 0 0 # (j >= 2) && ((turn == i ) || (flagturn == 0)) .names _nf1 _nfd _nfe .def 0 1 1 1 .names _nfe _nff - =_nfe # pc = 10 .mv pc$_nfe_n100$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_nfe_n100$true L11 # pc = 0 .mv pc$_nfe_n101$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_nfe_n101$false L1 # if/else ((j >= 2) && ((turn == i ) || (flagturn == 0))) .mv pc$_nfe$raw_n103 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_nfe_n100$true pc$_nfe_n101$false _nfe pc$_nfe$raw_n103 - - 0 =pc$_nfe_n101$false - - 1 =pc$_nfe_n100$true .mv _n108 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n108 L11 .names pc _n108 _n107 .def 0 - =pc 1 .names _n107 _n106 1 1 0 0 # pc = 11 .mv pc$_n106_n109$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n106_n109$true L12 .mv _n10c 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n10c L12 .names pc _n10c _n10b .def 0 - =pc 1 .names _n10b _n10a 1 1 0 0 .names _n10e 1 # nond_exit == 1 .names nond_exit _n10e _n10f .def 0 0 1 1 1 0 1 .names _n10f _n10d 0 1 1 0 .names _n10d _n111 - =_n10d # pc = 12 .mv pc$_n10d_n112$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n10d_n112$true L13 # pc = 11 .mv pc$_n10d_n113$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n10d_n113$false L12 # if/else (nond_exit == 1) .mv pc$_n10d$raw_n115 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n10d_n112$true pc$_n10d_n113$false _n10d pc$_n10d$raw_n115 - - 0 =pc$_n10d_n113$false - - 1 =pc$_n10d_n112$true .mv _n11a 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n11a L13 .names pc _n11a _n119 .def 0 - =pc 1 .names _n119 _n118 1 1 0 0 .names _n11c<0> 0 .names _n11c<1> 1 .names _n11d<0> 1 .names _n11d<1> 0 # 2 - 1 .names _n11f 0 .names _n11c<0> _n11d<0> _n11f _n11e<0> .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _n121 0 .names _n11c<0> _n11d<0> _n121 _n120 .def 0 0 0 1 1 0 1 0 1 0 1 1 1 1 1 1 1 .names _n11c<1> _n11d<1> _n120 _n11e<1> .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # turn == 2 - 1 .names turn _n11e<0> _n122<0> .def 0 0 1 1 1 0 1 .names _n11e<1> _n122<1> - =_n11e<1> .names _n122<0> _n122<1> _n123 .def 1 0 0 0 .names _n123 _n11b 0 1 1 0 .names _n11b _n124 - =_n11b # j = 0 .names j$_n11b_n125$true 0 # j = turn + 1 .names _n127 1 # turn + 1 .names _n129 0 .names turn _n127 _n129 _n128 .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _n12b 0 .names turn _n127 _n12b _n12a .def 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 .names _n128 j$_n11b_n126$false - =_n128 # if/else (turn == 2 - 1) .names j$_n11b_n125$true j$_n11b_n126$false _n11b j$_n11b$raw_n12d 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 # pc = 13 .mv pc$_n118_n131$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n118_n131$true L14 .mv _n134 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n134 L14 .names pc _n134 _n133 .def 0 - =pc 1 .names _n133 _n132 1 1 0 0 .mv _n136 3 idle want_in in_cs .names _n136 idle # flagj == 0 .names flagj _n136 _n135 .def 0 - =flagj 1 .names _n135 _n137 - =_n135 .names _n139<0> 0 .names _n139<1> 1 .names _n13a<0> 1 .names _n13a<1> 0 # 2 - 1 .names _n13c 0 .names _n139<0> _n13a<0> _n13c _n13b<0> .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _n13e 0 .names _n139<0> _n13a<0> _n13e _n13d .def 0 0 0 1 1 0 1 0 1 0 1 1 1 1 1 1 1 .names _n139<1> _n13a<1> _n13d _n13b<1> .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # j == 2 - 1 .names j _n13b<0> _n13f<0> .def 0 0 1 1 1 0 1 .names _n13b<1> _n13f<1> - =_n13b<1> .names _n13f<0> _n13f<1> _n140 .def 1 0 0 0 .names _n140 _n138 0 1 1 0 .names _n138 _n141 - =_n138 # j = 0 .names j$_n138_n142$true 0 # j = j + 1 .names _n144 1 # j + 1 .names _n146 0 .names j _n144 _n146 _n145 .def 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 # carry/borrow .names _n148 0 .names j _n144 _n148 _n147 .def 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 .names _n145 j$_n138_n143$false - =_n145 # if/else (j == 2 - 1) .names j$_n138_n142$true j$_n138_n143$false _n138 j$_n138$raw_n14a 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 # pc = 13 .mv pc$_n135_n14e$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n135_n14e$true L14 # pc = 14 .mv pc$_n135_n14f$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n135_n14f$false L15 # if/else (flagj == 0) .mv pc$_n135$raw_n152 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n135_n14e$true pc$_n135_n14f$false _n135 pc$_n135$raw_n152 - - 0 =pc$_n135_n14f$false - - 1 =pc$_n135_n14e$true .names j$_n138$raw_n14a j _n135 j$_n135$raw_n155 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv _n15a 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n15a L15 .names pc _n15a _n159 .def 0 - =pc 1 .names _n159 _n158 1 1 0 0 # pc = 15 .mv pc$_n158_n15b$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n158_n15b$true L16 .mv _n15e 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n15e L16 .names pc _n15e _n15d .def 0 - =pc 1 .names _n15d _n15c 1 1 0 0 .names _n160 1 # nond_exit == 1 .names nond_exit _n160 _n161 .def 0 0 1 1 1 0 1 .names _n161 _n15f 0 1 1 0 .names _n15f _n163 - =_n15f # pc = 0 .mv pc$_n15f_n164$true 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n15f_n164$true L1 # pc = 15 .mv pc$_n15f_n165$false 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n15f_n165$false L16 # if/else (nond_exit == 1) .mv pc$_n15f$raw_n167 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n15f_n164$true pc$_n15f_n165$false _n15f pc$_n15f$raw_n167 - - 0 =pc$_n15f_n165$false - - 1 =pc$_n15f_n164$true # case (pc ) .mv pc$_n15c$raw_n16c 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n15f$raw_n167 pc _n15c pc$_n15c$raw_n16c - - 0 =pc - - 1 =pc$_n15f$raw_n167 .mv pc$_n158$raw_n16e 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n158_n15b$true pc$_n15c$raw_n16c _n158 pc$_n158$raw_n16e - - 0 =pc$_n15c$raw_n16c - - 1 =pc$_n158_n15b$true .mv pc$_n132$raw_n173 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n135$raw_n152 pc$_n158$raw_n16e _n132 pc$_n132$raw_n173 - - 0 =pc$_n158$raw_n16e - - 1 =pc$_n135$raw_n152 .names j$_n135$raw_n155 j _n132 j$_n132$raw_n176 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_n118$raw_n17b 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n118_n131$true pc$_n132$raw_n173 _n118 pc$_n118$raw_n17b - - 0 =pc$_n132$raw_n173 - - 1 =pc$_n118_n131$true .names j$_n11b$raw_n12d j$_n132$raw_n176 _n118 j$_n118$raw_n17c 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_n10a$raw_n183 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n10d$raw_n115 pc$_n118$raw_n17b _n10a pc$_n10a$raw_n183 - - 0 =pc$_n118$raw_n17b - - 1 =pc$_n10d$raw_n115 .names j j$_n118$raw_n17c _n10a j$_n10a$raw_n186 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_n106$raw_n189 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n106_n109$true pc$_n10a$raw_n183 _n106 pc$_n106$raw_n189 - - 0 =pc$_n10a$raw_n183 - - 1 =pc$_n106_n109$true .names j j$_n10a$raw_n186 _n106 j$_n106$raw_n18c 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_ned$raw_n18f 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_nfe$raw_n103 pc$_n106$raw_n189 _ned pc$_ned$raw_n18f - - 0 =pc$_n106$raw_n189 - - 1 =pc$_nfe$raw_n103 .names j j$_n106$raw_n18c _ned j$_ned$raw_n192 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_ncb$raw_n196 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_ndb$raw_ne7 pc$_ned$raw_n18f _ncb pc$_ncb$raw_n196 - - 0 =pc$_ned$raw_n18f - - 1 =pc$_ndb$raw_ne7 .names j$_ndb$raw_nea j$_ned$raw_n192 _ncb j$_ncb$raw_n197 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_nc6$raw_n19f 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_nc6_nca$true pc$_ncb$raw_n196 _nc6 pc$_nc6$raw_n19f - - 0 =pc$_ncb$raw_n196 - - 1 =pc$_nc6_nca$true .names j$_nc6_nc9$true j$_ncb$raw_n197 _nc6 j$_nc6$raw_n1a0 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_nc2$raw_n1a7 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_nc2_nc5$true pc$_nc6$raw_n19f _nc2 pc$_nc2$raw_n1a7 - - 0 =pc$_nc6$raw_n19f - - 1 =pc$_nc2_nc5$true .names j j$_nc6$raw_n1a0 _nc2 j$_nc2$raw_n1aa 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_na8$raw_n1ae 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_na8_nc1$true pc$_nc2$raw_n1a7 _na8 pc$_na8$raw_n1ae - - 0 =pc$_nc2$raw_n1a7 - - 1 =pc$_na8_nc1$true .names j$_nab$raw_nbd j$_nc2$raw_n1aa _na8 j$_na8$raw_n1af 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_na3$raw_n1b7 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_na3_na7$true pc$_na8$raw_n1ae _na3 pc$_na3$raw_n1b7 - - 0 =pc$_na8$raw_n1ae - - 1 =pc$_na3_na7$true .names j$_na3_na6$true j$_na8$raw_n1af _na3 j$_na3$raw_n1b8 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_n97$raw_n1bf 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n9a$raw_na0 pc$_na3$raw_n1b7 _n97 pc$_n97$raw_n1bf - - 0 =pc$_na3$raw_n1b7 - - 1 =pc$_n9a$raw_na0 .names j j$_na3$raw_n1b8 _n97 j$_n97$raw_n1c2 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_n8a$raw_n1c5 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n8d$raw_n94 pc$_n97$raw_n1bf _n8a pc$_n8a$raw_n1c5 - - 0 =pc$_n97$raw_n1bf - - 1 =pc$_n8d$raw_n94 .names j j$_n97$raw_n1c2 _n8a j$_n8a$raw_n1c8 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_n85$raw_n1cc 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n85_n89$true pc$_n8a$raw_n1c5 _n85 pc$_n85$raw_n1cc - - 0 =pc$_n8a$raw_n1c5 - - 1 =pc$_n85_n89$true .names j$_n85_n88$true j$_n8a$raw_n1c8 _n85 j$_n85$raw_n1cd 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv pc$_n81$raw_n1d4 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n81_n84$true pc$_n85$raw_n1cc _n81 pc$_n81$raw_n1d4 - - 0 =pc$_n85$raw_n1cc - - 1 =pc$_n81_n84$true .names j j$_n85$raw_n1cd _n81 j$_n81$raw_n1d7 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 # if/else (perm == 1) .mv pc$_n7c$raw_n1dd 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names pc$_n81$raw_n1d4 pc _n7c pc$_n7c$raw_n1dd - - 0 =pc - - 1 =pc$_n81$raw_n1d4 .names j$_n81$raw_n1d7 j _n7c j$_n7c$raw_n1de 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 # conflict arbitrators .names flagturn$raw_n57 flagturn - =flagturn$raw_n57 .names flagj$raw_n51 flagj - =flagj$raw_n51 .names _n80 _n81 _n85 _n8a _n90 _n97 _n9c _na3 _na8 _nc2 _nc6 _ncb _ndc _ned _nff _n106 _n10a _n111 _n118 _n132 _n137 _n158 _n15c _n163 _n1e0 .def 0 1 1 - - - - - - - - - - - - - - - - - - - - - - 1 1 0 1 - - - - - - - - - - - - - - - - - - - - - 1 1 0 0 1 1 - - - - - - - - - - - - - - - - - - - 1 1 0 0 1 0 - - - - - - - - - - - - - - - - - - - 1 1 0 0 0 - 1 1 - - - - - - - - - - - - - - - - - 1 1 0 0 0 - 1 0 - - - - - - - - - - - - - - - - - 1 1 0 0 0 - 0 - 1 - - - - - - - - - - - - - - - - 1 1 0 0 0 - 0 - 0 1 - - - - - - - - - - - - - - - 1 1 0 0 0 - 0 - 0 0 1 - - - - - - - - - - - - - - 1 1 0 0 0 - 0 - 0 0 0 1 - - - - - - - - - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 1 1 - - - - - - - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 1 0 - - - - - - - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 1 1 - - - - - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 1 0 - - - - - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 1 - - - - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 1 1 - - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 1 0 - - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 1 - - - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 1 1 - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 1 0 - - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 0 - 1 - - 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 0 - 0 1 1 1 1 0 0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 - 0 0 - 0 1 0 1 .mv _n1e1 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 .names _n1e0 pc$_n7c$raw_n1dd pc _n1e1 1 - - =pc$_n7c$raw_n1dd 0 - - =pc .names out_turn$raw_n6f out_turn 0 0 1 1 .names out_flag$raw_n5d out_flag - =out_flag$raw_n5d .names _n80 _n81 _n85 _n8a _n97 _na3 _na8 _nb4 _nc2 _nc6 _ncb _ndc _ned _n106 _n10a _n118 _n124 _n132 _n137 _n141 _n1eb .def 0 1 0 1 - - - - - - - - - - - - - - - - - 1 1 0 0 0 0 1 - - - - - - - - - - - - - - 1 1 0 0 0 0 0 1 1 - - - - - - - - - - - - 1 1 0 0 0 0 0 1 0 - - - - - - - - - - - - 1 1 0 0 0 0 0 0 - 0 1 - - - - - - - - - - 1 1 0 0 0 0 0 0 - 0 0 1 1 - - - - - - - - 1 1 0 0 0 0 0 0 - 0 0 0 - 0 0 0 1 1 - - - 1 1 0 0 0 0 0 0 - 0 0 0 - 0 0 0 1 0 - - - 1 1 0 0 0 0 0 0 - 0 0 0 - 0 0 0 0 - 1 1 1 1 1 0 0 0 0 0 0 - 0 0 0 - 0 0 0 0 - 1 1 0 1 .names _n1eb j$_n7c$raw_n1de j _n1ec 1 0 - 0 1 1 - 1 0 - 0 0 0 - 1 1 # non-blocking assignments # latches .r pc$raw_n7b pc - =pc$raw_n7b .latch _n1e1 pc .r j$raw_n7a j 0 0 1 1 .latch _n1ec j # quasi-continuous assignment .end