$Id: README,v 1.1 1997/03/02 02:03:36 fabio Exp $

MinMax circuit. Translated into Verilog from the LDS description in
"Verification of Sequential Machines Using Boolean Functional Vectors"
by Coudert, Berthet, and Madre.

The VIS script computes the reachable states and check the reachability
of a reset state from the other reachable states.

Author: Fabio Somenzi <Fabio@Colorado.EDU>