# vis release 1.4 (compiled 20-Jun-02 at 7:12 PM)
# network name: unnamed
# generated: Tue Jul  2 10:55:31 2002
#
# name           type            mddId vals levs
TESTMODE        primary-input       17    2 (0)
oLDALUout$NS    shadow               1    2 (1)
oLDALUout       latch                0    2 (2)
qLDALUout       latch               90    2 (3)
qLDALUout$NS    shadow              91    2 (4)
qShiftRight     latch               64    2 (5)
qShiftRight$NS  shadow              65    2 (6)
I681            latch                9    2 (7)
I681$NS         shadow              10    2 (8)
I680            latch                3    2 (9)
I680$NS         shadow               4    2 (10)
I679$NS         shadow               8    2 (11)
I679            latch                7    2 (12)
qPass1$NS       shadow              27    2 (13)
qPass1          latch               26    2 (14)
I683$NS         shadow              15    2 (15)
I683            latch               14    2 (16)
INS_2           primary-input       21    2 (17)
qINSo_2$NS      shadow              61    2 (18)
qINSo_2         latch               60    2 (19)
INS_1           primary-input       16    2 (20)
qINSo_1$NS      shadow              19    2 (21)
qINSo_1         latch               18    2 (22)
qINSo_0         latch               62    2 (23)
qINSo_0$NS      shadow              63    2 (24)
INS_0           primary-input       20    2 (25)
qPass2          latch               22    2 (26)
qPass2$NS       shadow              23    2 (27)
I682            latch                5    2 (28)
I682$NS         shadow               6    2 (29)
MQ_q_0          latch               11    2 (30)
MQ_q_0$NS       shadow              12    2 (31)
LDAcc           primary-input       81    2 (32)
DR_q_7          latch               56    2 (33)
DR_q_7$NS       shadow              57    2 (34)
STDR            primary-input       48    2 (35)
Acc_q_7         latch               58    2 (36)
Acc_q_7$NS      shadow              59    2 (37)
LDMQ            primary-input       78    2 (38)
inBUS_7         primary-input       88    2 (39)
inBUS_0         primary-input       82    2 (40)
DR_q_0          latch               46    2 (41)
DR_q_0$NS       shadow              47    2 (42)
Acc_q_0         latch               49    2 (43)
Acc_q_0$NS      shadow              50    2 (44)
MQ_q_7$NS       shadow              80    2 (45)
MQ_q_7          latch               79    2 (46)
Acc_q_1         latch               44    2 (47)
Acc_q_1$NS      shadow              45    2 (48)
DR_q_1          latch               42    2 (49)
DR_q_1$NS       shadow              43    2 (50)
inBUS_1         primary-input       83    2 (51)
MQ_q_1          latch               76    2 (52)
MQ_q_1$NS       shadow              77    2 (53)
Acc_q_2         latch               32    2 (54)
Acc_q_2$NS      shadow              33    2 (55)
DR_q_2          latch               30    2 (56)
DR_q_2$NS       shadow              31    2 (57)
inBUS_2         primary-input       84    2 (58)
MQ_q_2          latch               74    2 (59)
MQ_q_2$NS       shadow              75    2 (60)
DR_q_3          latch               24    2 (61)
DR_q_3$NS       shadow              25    2 (62)
Acc_q_3         latch               28    2 (63)
Acc_q_3$NS      shadow              29    2 (64)
inBUS_3         primary-input       85    2 (65)
MQ_q_3          latch               72    2 (66)
MQ_q_3$NS       shadow              73    2 (67)
LDDR            primary-input        2    2 (68)
Acc_q_4$NS      shadow              37    2 (69)
Acc_q_4         latch               36    2 (70)
DR_q_4          latch               34    2 (71)
DR_q_4$NS       shadow              35    2 (72)
inBUS_4         primary-input       87    2 (73)
MQ_q_4          latch               70    2 (74)
MQ_q_4$NS       shadow              71    2 (75)
DR_q_5          latch               38    2 (76)
DR_q_5$NS       shadow              39    2 (77)
DR_q_6$NS       shadow              53    2 (78)
DR_q_6          latch               52    2 (79)
inBUS_6         primary-input       89    2 (80)
inBUS_5         primary-input       86    2 (81)
Acc_q_5         latch               40    2 (82)
Acc_q_5$NS      shadow              41    2 (83)
MQ_q_5          latch               68    2 (84)
MQ_q_5$NS       shadow              69    2 (85)
STMQ            primary-input       13    2 (86)
MQ_q_6          latch               66    2 (87)
MQ_q_6$NS       shadow              67    2 (88)
STAcc           primary-input       51    2 (89)
Acc_q_6         latch               54    2 (90)
Acc_q_6$NS      shadow              55    2 (91)