# vl2mv arbiter_le.v # version: 0.2 # date: 15:54:18 11/04/96 (PST) .model main # I/O ports .outputs ackA .outputs ackB .outputs ackC .mv sel 4 A B C X # assign active = pass_tokenA || pass_tokenB || pass_tokenC # pass_tokenA || pass_tokenB .names pass_tokenA pass_tokenB _n1 .def 1 0 0 0 # pass_tokenA || pass_tokenB || pass_tokenC .names _n1 pass_tokenC _n2 .def 1 0 0 0 .names _n2 active$raw_n0 - =_n2 .mv _n3 4 A B C X .names _n3 A .subckt controller controllerA req=reqA ack=ackA sel=sel pass_token=pass_tokenA id=_n3 .mv _n4 4 A B C X .names _n4 B .subckt controller controllerB req=reqB ack=ackB sel=sel pass_token=pass_tokenB id=_n4 .mv _n5 4 A B C X .names _n5 C .subckt controller controllerC req=reqC ack=ackC sel=sel pass_token=pass_tokenC id=_n5 .subckt arbiter arbiter sel=sel active=active .subckt client clientA req=reqA ack=ackA .subckt client clientB req=reqB ack=ackB .subckt client clientC req=reqC ack=ackC .subckt observer observer req=reqA ack=ackA # conflict arbitrators .names active$raw_n0 active 0 0 1 1 # non-blocking assignments # latches # quasi-continuous assignment .end .model controller # I/O ports .inputs sel .inputs req .outputs pass_token .outputs ack .inputs id .mv sel 4 A B C X .mv state 3 IDLE READY BUSY .mv id 4 A B C X # state = 0 .mv state$raw_n6 3 IDLE READY BUSY .names state$raw_n6 IDLE # non-blocking assignments for initial # ack = 0 .names ack$raw_n7 0 # non-blocking assignments for initial # pass_token = 1 .names pass_token$raw_n8 1 # non-blocking assignments for initial # assign is_selected = (sel == id ) # sel == id .names sel id _na .def 0 - =sel 1 .names _na is_selected$raw_n9 - =_na .mv _nd 3 IDLE READY BUSY .names _nd IDLE .names state _nd _nc .def 0 - =state 1 .names _nc _nb 1 1 0 0 .names is_selected _ne - =is_selected .names req _nf - =req # state = 1 .mv state$req_n10$true 3 IDLE READY BUSY .names state$req_n10$true READY # pass_token = 0 .names pass_token$req_n11$true 0 # pass_token = 1 .names pass_token$req_n12$false 1 # if/else (req ) .names pass_token$req_n11$true pass_token$req_n12$false req pass_token$req$raw_n15 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$req$raw_n19 3 IDLE READY BUSY .names state$req_n10$true state req state$req$raw_n19 - - 0 =state - - 1 =state$req_n10$true # pass_token = 0 .names pass_token$is_selected_n1b$false 0 # if/else (is_selected ) .names pass_token$req$raw_n15 pass_token$is_selected_n1b$false is_selected pass_token$is_selected$raw_n1f 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$is_selected$raw_n21 3 IDLE READY BUSY .names state$req$raw_n19 state is_selected state$is_selected$raw_n21 - - 0 =state - - 1 =state$req$raw_n19 .mv _n26 3 IDLE READY BUSY .names _n26 READY .names state _n26 _n25 .def 0 - =state 1 .names _n25 _n24 1 1 0 0 # state = 2 .mv state$_n24_n27$true 3 IDLE READY BUSY .names state$_n24_n27$true BUSY # ack = 1 .names ack$_n24_n28$true 1 .mv _n2b 3 IDLE READY BUSY .names _n2b BUSY .names state _n2b _n2a .def 0 - =state 1 .names _n2a _n29 1 1 0 0 .names req _n2c 0 1 1 0 .names _n2c _n2d - =_n2c # state = 0 .mv state$_n2c_n2e$true 3 IDLE READY BUSY .names state$_n2c_n2e$true IDLE # ack = 0 .names ack$_n2c_n2f$true 0 # pass_token = 1 .names pass_token$_n2c_n30$true 1 # if/else (!req ) .names pass_token$_n2c_n30$true pass_token _n2c pass_token$_n2c$raw_n37 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$_n2c$raw_n39 3 IDLE READY BUSY .names state$_n2c_n2e$true state _n2c state$_n2c$raw_n39 - - 0 =state - - 1 =state$_n2c_n2e$true .names ack$_n2c_n2f$true ack _n2c ack$_n2c$raw_n3a 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 # case (state ) .mv state$_n29$raw_n42 3 IDLE READY BUSY .names state$_n2c$raw_n39 state _n29 state$_n29$raw_n42 - - 0 =state - - 1 =state$_n2c$raw_n39 .names pass_token$_n2c$raw_n37 pass_token _n29 pass_token$_n29$raw_n43 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .names ack$_n2c$raw_n3a ack _n29 ack$_n29$raw_n45 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$_n24$raw_n47 3 IDLE READY BUSY .names state$_n24_n27$true state$_n29$raw_n42 _n24 state$_n24$raw_n47 - - 0 =state$_n29$raw_n42 - - 1 =state$_n24_n27$true .names ack$_n24_n28$true ack$_n29$raw_n45 _n24 ack$_n24$raw_n48 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .names pass_token pass_token$_n29$raw_n43 _n24 pass_token$_n24$raw_n4f 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$_nb$raw_n52 3 IDLE READY BUSY .names state$is_selected$raw_n21 state$_n24$raw_n47 _nb state$_nb$raw_n52 - - 0 =state$_n24$raw_n47 - - 1 =state$is_selected$raw_n21 .names pass_token$is_selected$raw_n1f pass_token$_n24$raw_n4f _nb pass_token$_nb$raw_n53 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .names ack ack$_n24$raw_n48 _nb ack$_nb$raw_n5b 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 # conflict arbitrators .names is_selected$raw_n9 is_selected 0 0 1 1 .names _nb _ne _nf _n24 _n29 _n2d _n5d .def 0 1 1 1 - - - 1 0 - - 1 - - 1 0 - - 0 1 1 1 .mv _n5e 3 IDLE READY BUSY .names _n5d state$_nb$raw_n52 state _n5e 1 - - =state$_nb$raw_n52 0 - - =state .names _nb _ne _nf _n24 _n29 _n2d _n62 .def 0 1 1 1 - - - 1 1 1 0 - - - 1 1 0 - - - - 1 0 - - 0 1 1 1 .names _n62 pass_token$_nb$raw_n53 pass_token _n63 1 0 - 0 1 1 - 1 0 - 0 0 0 - 1 1 .names _nb _n24 _n29 _n2d _n64 .def 0 0 1 - - 1 0 0 1 1 1 .names _n64 ack$_nb$raw_n5b ack _n65 1 0 - 0 1 1 - 1 0 - 0 0 0 - 1 1 # non-blocking assignments # latches .r pass_token$raw_n8 pass_token 0 0 1 1 .latch _n63 pass_token .r state$raw_n6 state - =state$raw_n6 .latch _n5e state .r ack$raw_n7 ack 0 0 1 1 .latch _n65 ack # quasi-continuous assignment .end .model arbiter # I/O ports .outputs sel .inputs active .mv sel 4 A B C X .mv state 4 A B C X # state = 0 .mv state$raw_n66 4 A B C X .names state$raw_n66 A # non-blocking assignments for initial # assign sel = active ? state : 3 .mv sel$raw_n67 4 A B C X .mv _n68 4 A B C X .names _n68 X # active ? state : 3 .mv _n69 4 A B C X .names state _n68 active _n69 - - 0 =_n68 - - 1 =state .names _n69 sel$raw_n67 - =_n69 .names active _n6a - =active .mv _n6d 4 A B C X .names _n6d A .names state _n6d _n6c .def 0 - =state 1 .names _n6c _n6b 1 1 0 0 # state = 1 .mv state$_n6b_n6e$true 4 A B C X .names state$_n6b_n6e$true B .mv _n71 4 A B C X .names _n71 B .names state _n71 _n70 .def 0 - =state 1 .names _n70 _n6f 1 1 0 0 # state = 2 .mv state$_n6f_n72$true 4 A B C X .names state$_n6f_n72$true C .mv _n75 4 A B C X .names _n75 C .names state _n75 _n74 .def 0 - =state 1 .names _n74 _n73 1 1 0 0 # state = 0 .mv state$_n73_n76$true 4 A B C X .names state$_n73_n76$true A # case (state ) .mv state$_n73$raw_n79 4 A B C X .names state$_n73_n76$true state _n73 state$_n73$raw_n79 - - 0 =state - - 1 =state$_n73_n76$true .mv state$_n6f$raw_n7a 4 A B C X .names state$_n6f_n72$true state$_n73$raw_n79 _n6f state$_n6f$raw_n7a - - 0 =state$_n73$raw_n79 - - 1 =state$_n6f_n72$true .mv state$_n6b$raw_n7e 4 A B C X .names state$_n6b_n6e$true state$_n6f$raw_n7a _n6b state$_n6b$raw_n7e - - 0 =state$_n6f$raw_n7a - - 1 =state$_n6b_n6e$true # if/else (active ) .mv state$active$raw_n84 4 A B C X .names state$_n6b$raw_n7e state active state$active$raw_n84 - - 0 =state - - 1 =state$_n6b$raw_n7e # conflict arbitrators .names sel$raw_n67 sel - =sel$raw_n67 .names _n6a _n6b _n6f _n73 _n85 .def 0 1 1 - - 1 1 0 1 - 1 1 0 0 1 1 .mv _n86 4 A B C X .names _n85 state$active$raw_n84 state _n86 1 - - =state$active$raw_n84 0 - - =state # non-blocking assignments # latches .r state$raw_n66 state - =state$raw_n66 .latch _n86 state # quasi-continuous assignment .end .model client # I/O ports .outputs req .inputs ack .mv state 3 NO_REQ REQ HAVE_TOKEN # req = 0 .names req$raw_n89 0 # non-blocking assignments for initial # state = 0 .mv state$raw_n8a 3 NO_REQ REQ HAVE_TOKEN .names state$raw_n8a NO_REQ # non-blocking assignments for initial # assign rand_choice = $NDset ( 0,1 ) .names rand_choice 0 1 .mv _n8f 3 NO_REQ REQ HAVE_TOKEN .names _n8f NO_REQ .names state _n8f _n8e .def 0 - =state 1 .names _n8e _n8d 1 1 0 0 .names rand_choice _n90 - =rand_choice # req = 1 .names req$rand_choice_n91$true 1 # state = 1 .mv state$rand_choice_n92$true 3 NO_REQ REQ HAVE_TOKEN .names state$rand_choice_n92$true REQ # if/else (rand_choice ) .names req$rand_choice_n91$true req rand_choice req$rand_choice$raw_n97 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$rand_choice$raw_n99 3 NO_REQ REQ HAVE_TOKEN .names state$rand_choice_n92$true state rand_choice state$rand_choice$raw_n99 - - 0 =state - - 1 =state$rand_choice_n92$true .mv _n9c 3 NO_REQ REQ HAVE_TOKEN .names _n9c REQ .names state _n9c _n9b .def 0 - =state 1 .names _n9b _n9a 1 1 0 0 .names ack _n9d - =ack # state = 2 .mv state$ack_n9e$true 3 NO_REQ REQ HAVE_TOKEN .names state$ack_n9e$true HAVE_TOKEN # if/else (ack ) .mv state$ack$raw_na1 3 NO_REQ REQ HAVE_TOKEN .names state$ack_n9e$true state ack state$ack$raw_na1 - - 0 =state - - 1 =state$ack_n9e$true .mv _na4 3 NO_REQ REQ HAVE_TOKEN .names _na4 HAVE_TOKEN .names state _na4 _na3 .def 0 - =state 1 .names _na3 _na2 1 1 0 0 .names rand_choice _na5 - =rand_choice # req = 0 .names req$rand_choice_na6$true 0 # state = 0 .mv state$rand_choice_na7$true 3 NO_REQ REQ HAVE_TOKEN .names state$rand_choice_na7$true NO_REQ # if/else (rand_choice ) .names req$rand_choice_na6$true req rand_choice req$rand_choice$raw_nac 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$rand_choice$raw_nae 3 NO_REQ REQ HAVE_TOKEN .names state$rand_choice_na7$true state rand_choice state$rand_choice$raw_nae - - 0 =state - - 1 =state$rand_choice_na7$true # case (state ) .names req$rand_choice$raw_nac req _na2 req$_na2$raw_nb3 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$_na2$raw_nb5 3 NO_REQ REQ HAVE_TOKEN .names state$rand_choice$raw_nae state _na2 state$_na2$raw_nb5 - - 0 =state - - 1 =state$rand_choice$raw_nae .mv state$_n9a$raw_nb6 3 NO_REQ REQ HAVE_TOKEN .names state$ack$raw_na1 state$_na2$raw_nb5 _n9a state$_n9a$raw_nb6 - - 0 =state$_na2$raw_nb5 - - 1 =state$ack$raw_na1 .names req req$_na2$raw_nb3 _n9a req$_n9a$raw_nb9 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .names req$rand_choice$raw_n97 req$_n9a$raw_nb9 _n8d req$_n8d$raw_nbc 0 - 1 0 1 - 1 1 - 0 0 0 - 1 0 1 .mv state$_n8d$raw_nbe 3 NO_REQ REQ HAVE_TOKEN .names state$rand_choice$raw_n99 state$_n9a$raw_nb6 _n8d state$_n8d$raw_nbe - - 0 =state$_n9a$raw_nb6 - - 1 =state$rand_choice$raw_n99 # conflict arbitrators .names _n8d _n90 _n9a _na2 _na5 _nc5 .def 0 1 1 - - - 1 0 - 0 1 1 1 .names _nc5 req$_n8d$raw_nbc req _nc6 1 0 - 0 1 1 - 1 0 - 0 0 0 - 1 1 .names _n8d _n90 _n9a _n9d _na2 _na5 _nc7 .def 0 1 1 - - - - 1 0 - 1 1 - - 1 0 - 0 - 1 1 1 .mv _nc8 3 NO_REQ REQ HAVE_TOKEN .names _nc7 state$_n8d$raw_nbe state _nc8 1 - - =state$_n8d$raw_nbe 0 - - =state # non-blocking assignments # latches .r req$raw_n89 req 0 0 1 1 .latch _nc6 req .r state$raw_n8a state - =state$raw_n8a .latch _nc8 state # quasi-continuous assignment .end .model observer # I/O ports .inputs req .inputs ack .mv state 3 IDLE BAD GOOD # state = 0 .mv state$raw_ncb 3 IDLE BAD GOOD .names state$raw_ncb IDLE # non-blocking assignments for initial # assign rand_choice = $NDset ( 0,1 ) .names rand_choice 0 1 .mv _nd0 3 IDLE BAD GOOD .names _nd0 IDLE .names state _nd0 _ncf .def 0 - =state 1 .names _ncf _nce 1 1 0 0 # req && rand_choice .names req rand_choice _nd1 .def 0 1 1 1 .names _nd1 _nd2 - =_nd1 # state = 1 .mv state$_nd1_nd3$true 3 IDLE BAD GOOD .names state$_nd1_nd3$true BAD # if/else (req && rand_choice ) .mv state$_nd1$raw_nd6 3 IDLE BAD GOOD .names state$_nd1_nd3$true state _nd1 state$_nd1$raw_nd6 - - 0 =state - - 1 =state$_nd1_nd3$true .mv _nd9 3 IDLE BAD GOOD .names _nd9 BAD .names state _nd9 _nd8 .def 0 - =state 1 .names _nd8 _nd7 1 1 0 0 .names ack _nda - =ack # state = 2 .mv state$ack_ndb$true 3 IDLE BAD GOOD .names state$ack_ndb$true GOOD # if/else (ack ) .mv state$ack$raw_nde 3 IDLE BAD GOOD .names state$ack_ndb$true state ack state$ack$raw_nde - - 0 =state - - 1 =state$ack_ndb$true # case (state ) .mv state$_nd7$raw_ne1 3 IDLE BAD GOOD .names state$ack$raw_nde state _nd7 state$_nd7$raw_ne1 - - 0 =state - - 1 =state$ack$raw_nde .mv state$_nce$raw_ne2 3 IDLE BAD GOOD .names state$_nd1$raw_nd6 state$_nd7$raw_ne1 _nce state$_nce$raw_ne2 - - 0 =state$_nd7$raw_ne1 - - 1 =state$_nd1$raw_nd6 # conflict arbitrators .names _nce _nd2 _nd7 _nda _ne6 .def 0 1 1 - - 1 0 - 1 1 1 .mv _ne7 3 IDLE BAD GOOD .names _ne6 state$_nce$raw_ne2 state _ne7 1 - - =state$_nce$raw_ne2 0 - - =state # non-blocking assignments # latches .r state$raw_ncb state - =state$raw_ncb .latch _ne7 state # quasi-continuous assignment .end