Nets

Name

SignalIn, SignalOut ... - Creation of nets

Synopsys

netA = SignalIn ( "a", 4 )

Description

How to create and use nets.

Nets

Differents kind of nets are listed below :

• SignalIn : Creation of an input port
• SignalOut : Creation of an output port
• SignalInOut : Creation of an inout port
• SignalUnknown : Creation of an input/output port which direction is not defined
• TriState : Creation of a tristate port
• CkIn : Creation of a clock port
• VddIn : Creation of the vdd alimentation
• VssIn : Creation of the vss alimentation
• Signal : Creation of an internal net

Parameters

All kind of constructors have the same parameters :

• name : the name of the net (mandatory argument)
• arity : the arity of the net (mandatory argument)
• indice : for bit vectors only : the LSB bit (optional argument : set to 0 by default)

Only CkIn, VddIn and VssIn do not have the same parameters : there is only the name parameter (they are 1 bit nets).

Functions and methods

Some functions/methods are provided in order to handle nets :

• function Cat : Concatenation of nets, beginning with the MSB

  Inst ( 'DpgenInv'
       , map = { 'i0'  : Cat ( A, B )
               , 'nq'  : S
               , 'vdd' : vdd
               , 'vss' : vss
               }
       )
  

  Or :

  tab = []
  tab.append ( A )
  tab.append ( B )
  
  Inst ( 'DpgenInv'
       , map = { 'i0'  : Cat ( tab )
               , 'nq'  : S
               , 'vdd' : vdd
               , 'vss' : vss
               }
       )
  

  If A and B are 2 bits nets, the net myNet will be such as :

  myNet[3] = A[1]
  myNet[2] = A[0]
  myNet[1] = B[1]
  myNet[0] = B[0]
  

• function Extend : Creation of a net which is an extension of the net which it is applied to

  temp    = Signal (     "temp", 5 )
  tempExt = Signal ( "temp_ext", 8 )
  
  tempExt <= temp.Extand ( 8, 'one' )
  

• method Alias : Creation of an alias name for a net

  cin.Alias  ( c_temp[0] )
  cout.Alias ( c_temp[4] )
  for i in range ( 4 ) :
    Inst ( "Fulladder"
         , map = { 'a'    : a[i]
                 , 'b'    : b[i]
                 , 'cin'  : c_temp[i]
                 , 'sout' : sout[i]
                 , 'cout' : c_temp[i+1]
                 , 'vdd'  : vdd
                 , 'vss'  : vss
                 }
         )
  

Example

You can see a concrete example at : Example

Errors

Some errors may occur :

• Error in SignalIn :
the lenght of the net must be a positive value.
  One can not create a net with a negative lenght.

See Also

Introduction