Changes between Version 6 and Version 7 of partners

Timestamp:

Jun 16, 2008, 3:54:26 PM (17 years ago)

Author:

fpecheux

Comment:

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partners

@@ -46 +46 @@
 *       Embed the remapping functionality onto the SoC. This implies the development of a static task placement algorithm, the modification of the routing parameters in the global routers and local interconnects, as well as an embedded application linker. With this approach, it is possible for the MP2SoC to self adapt the application to its downgraded architecture without any modification of the original firmware, considered as a collection and precompiled object files and link directives.
 
+'''François PECHEUX''' is an Assistant Professor at the « University Pierre et Marie Curie », in Paris. He received  a PhD in Electronic Engineering and Computer Science in 1992, and since 2002 is member of the LIP6 Laboratory, in the « Embedded Systems » team. His main research activity focuses on the efficient modelling and simulation of very complex Massively Parallel MultiProcessor Systems on Chip. In particular, he participates in the development of a promising parallelizable simulation technique for Transaction Level Modeling with Timing (TLM/T) platforms (speedup x 20). He is also an active member of the SoCLib project, funded by ANR 2006, and works on power consumption and securized IPs in SoCs.
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+'''Mounir BENABDENBI''' is an Assistant Professor at the « University Pierre et Marie Curie », in Paris. He received a PhD in Electronic Engineering and Computer Science in 2002, and since 2003 is member of the LIP6 Laboratory, in the « Embedded Systems » team. He heads the test and reliability research group, and has developed an innovative method for online MPSoC testing. He is also working on specific MP2SoC systems for automotive (obstacle detection), containing more than 30 32-bit processors
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+'''Franck WAJSBURT''' is an Assistant Professor at the « University Pierre et Marie Curie », in Paris. He has a PhD in Electronic Engineering and Computer Science, and is member of the LIP6 Laboratory, in the « Embedded Systems » team. He has experience in the design of high performance superscalar processors and in the design of real time operating systems and heterogeneous micro-kernels involving DSPs and different brands of processors.
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+'''Alain GREINER''' is a Professor at the « University Pierre et Marie Curie », in Paris. He is vice-director of the LIP6 Laboratory, and runs the « Embedded Systems » team. He participated in the design of one of the first Network on Chip, SPIN, and currently focuses its research activity on ASPIN, “Asynchronous SPIN”, A Network on Chip suited for GALS Architecture. He also  runs the technical part of the SocLib project.
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