[16] | 1 | /* |
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[279] | 2 | * hal_kentry.S - Interrupt / Exception / Syscall kernel entry point for MIPS32 |
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[16] | 3 | * |
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| 4 | * AUthors Ghassan Almaless (2007,2008,2009,2010,2011,2012) |
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| 5 | * Mohamed Lamine Karaoui (2015) |
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| 6 | * Alain Greiner (2017) |
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| 7 | * |
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| 8 | * Copyright (c) UPMC Sorbonne Universites |
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| 9 | * |
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| 10 | * This file is part of ALMOS-MKH. |
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| 11 | * |
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| 12 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 13 | * under the terms of the GNU General Public License as published by |
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| 14 | * the Free Software Foundation; version 2.0 of the License. |
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| 15 | * |
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| 16 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 19 | * General Public License for more details. |
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| 20 | * |
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| 21 | * You should have received a copy of the GNU General Public License |
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| 22 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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| 23 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 24 | */ |
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| 25 | |
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| 26 | #include <mips32_uzone.h> |
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| 27 | |
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| 28 | #--------------------------------------------------------------------------------- |
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| 29 | # This code is the unique kernel entry point in case of exception, interrupt, |
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| 30 | # or syscall for the TSAR_MIPS32 architecture. |
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| 31 | # |
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[296] | 32 | # When we enter the kernel, we test the status register: |
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[279] | 33 | # - If the core is in user mode, we desactivate the MMU, and we save |
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| 34 | # the core context in the uzone of the calling thread descriptor. |
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| 35 | # - If the core is already in kernel mode (in case of interrupt), |
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| 36 | # we save the context in the kernel stack. |
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| 37 | # - In both cases, we increment the cores_in_kernel variable, |
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| 38 | # and we call the relevant exception/interrupt/syscall handler |
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[16] | 39 | # |
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[279] | 40 | # When we exit the kernel after handler execution: |
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| 41 | # - we restore the core context from the uzone |
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[16] | 42 | #--------------------------------------------------------------------------------- |
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| 43 | |
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[296] | 44 | .section .kentry, "ax", @progbits |
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[279] | 45 | |
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| 46 | .extern hal_do_interrupt |
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| 47 | .extern hal_do_exception |
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| 48 | .extern hal_do_syscall |
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| 49 | .extern cluster_core_kernel_enter |
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| 50 | .extern cluster_core_kernel_exit |
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| 51 | |
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[16] | 52 | .org 0x180 |
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[279] | 53 | .ent kernel_enter |
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| 54 | .global kernel_enter |
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| 55 | |
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[16] | 56 | .set noat |
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| 57 | .set noreorder |
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| 58 | |
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| 59 | #define SAVE_SIZE CPU_REGS_NR*4 |
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| 60 | #define LID_WIDTH 2 |
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| 61 | #define CXY_WIDTH 8 |
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| 62 | #define CXY_MASK 0xFF |
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| 63 | #define MMU_MODE_MASK 0xF |
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| 64 | #define GID_MASK 0x3FF |
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| 65 | #define LID_MASK 0x3 |
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| 66 | |
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| 67 | #--------------------------------------------------------------------------------- |
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[279] | 68 | # Kernel Entry point for Interrupt / Exception / Syscall |
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[16] | 69 | #--------------------------------------------------------------------------------- |
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| 70 | |
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[279] | 71 | kernel_enter: |
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[16] | 72 | mfc0 $26, $12 # read SR to test user/kernel mode |
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| 73 | andi $26, $26, 0x10 # User Mode bitmask |
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| 74 | beq $26, $0, kernel_mode |
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| 75 | ori $26, $0, 0x3 # $26 <= MMU OFF value |
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| 76 | |
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| 77 | #--------------------------------------------------------------------------------------- |
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| 78 | # this code is executed when the core is in user mode: |
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| 79 | # - we use the uzone defined in user thread descriptor. |
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| 80 | # - we set the MMU off, and save the CP2_MODE register to uzone. |
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| 81 | # - we save the user thread stack pointer to uzone and load the kernel stack pointer |
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| 82 | # - we store the uzone pointer in $27 |
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| 83 | |
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| 84 | user_mode: |
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| 85 | mtc2 $26, $1 # set MMU OFF |
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| 86 | nop |
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| 87 | |
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| 88 | mfc0 $26, $4, 2 # $26 <= thread pointer |
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| 89 | lw $26, 0($26) # $26 <= uzone pointer |
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| 90 | |
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| 91 | sw $29, (UZ_SP*4)($26) # save user stack to uzone |
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| 92 | lw $29, (UZ_KSP*4)($26) # load kernel stack from uzone |
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| 93 | |
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| 94 | ori $27, $0, 0xF # MMU old value: assumed ON |
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| 95 | sw $27, (UZ_MODE*4)($26) # save MMU MODE to uzone |
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| 96 | |
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| 97 | j unified_mode |
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| 98 | or $27, $0, $26 # $27 <= uzone |
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| 99 | |
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| 100 | #--------------------------------------------------------------------------------------- |
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| 101 | # this code is executed when the core is in kernel mode: |
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[279] | 102 | # - we use an uzone dynamically allocated in kernel stack. |
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[16] | 103 | # - we set the MMU off, set the MMU data_paddr extension to local_cxy, |
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| 104 | # and save the CP2_MODE and CP2_DEXT to uzone. |
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| 105 | # - we save the kernel stack pointer to uzone and load the new kernel stack pointer |
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| 106 | # - we store the uzone pointer in $27 |
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| 107 | |
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| 108 | kernel_mode: |
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| 109 | mfc2 $26, $24 |
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| 110 | andi $26, $26, CXY_MASK # $26 <= CP2_DEXT |
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| 111 | |
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| 112 | mfc0 $27, $15, 1 |
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| 113 | andi $27, $27, GID_MASK # $27 <= core_gid (4/4/2 format) |
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| 114 | |
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| 115 | srl $27, $27, LID_WIDTH # $27 <= local_cxy |
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| 116 | mtc2 $27, $24 # set local_cxy to CP2_DEXT |
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| 117 | |
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| 118 | # use $26 to save both CP2_MODE (4 bits) and CP2_DEXT (8 bits) values |
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| 119 | |
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| 120 | mfc2 $27, $1 |
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| 121 | andi $27, $27, MMU_MODE_MASK # $27 <= CP2_MODE |
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| 122 | sll $27, $27, CXY_WIDTH # $27 <= 0x00000M00 |
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| 123 | or $26, $26, $27 # $26 <= 0x00000MXY |
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| 124 | |
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| 125 | ori $27, $0, 0x3 |
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| 126 | mtc2 $27, $1 # set MMU OFF |
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| 127 | |
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| 128 | # save old SP, CP2_MODE and CP2_DEXT in uzone allocated in kernel stack |
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| 129 | |
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| 130 | addiu $27, $29, -(SAVE_SIZE) # allocate an uzone in stack (use $27 as KSP) |
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| 131 | sw $29, (UZ_SP*4)($27) # save old KSP in this uzone |
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| 132 | |
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| 133 | srl $29, $26, CXY_WIDTH |
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| 134 | sw $29, (UZ_MODE*4)($27) # save CP2_MODE in this uzone |
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| 135 | |
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| 136 | andi $26, $26, CXY_MASK |
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| 137 | sw $26, (UZ_DEXT*4)($27) # save CP2_DEXT in this uzone |
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| 138 | |
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| 139 | or $29, $27, $0 # load new kernel stack pointer |
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| 140 | |
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| 141 | #-------------------------------------------------------------------------------------- |
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[279] | 142 | # This code is executed in both modes, and saves the core context, |
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| 143 | # with the two following assumptions: |
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| 144 | # - $27 contains the pointer on uzone to save the core registers |
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[16] | 145 | # - $29 contains the kernel stack pointer |
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| 146 | |
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| 147 | unified_mode: |
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| 148 | sw $1, (UZ_AT*4)($27) |
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| 149 | sw $2, (UZ_V0*4)($27) |
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| 150 | sw $3, (UZ_V1*4)($27) |
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| 151 | sw $4, (UZ_A0*4)($27) |
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| 152 | sw $5, (UZ_A1*4)($27) |
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| 153 | sw $6, (UZ_A2*4)($27) |
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| 154 | sw $7, (UZ_A3*4)($27) |
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| 155 | sw $8, (UZ_T0*4)($27) |
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| 156 | sw $9, (UZ_T1*4)($27) |
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| 157 | sw $10, (UZ_T2*4)($27) |
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| 158 | sw $11, (UZ_T3*4)($27) |
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| 159 | sw $12, (UZ_T4*4)($27) |
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| 160 | sw $13, (UZ_T5*4)($27) |
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| 161 | sw $14, (UZ_T6*4)($27) |
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| 162 | sw $15, (UZ_T7*4)($27) |
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| 163 | sw $16, (UZ_S0*4)($27) |
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| 164 | sw $17, (UZ_S1*4)($27) |
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| 165 | sw $18, (UZ_S2*4)($27) |
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| 166 | sw $19, (UZ_S3*4)($27) |
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| 167 | sw $20, (UZ_S4*4)($27) |
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| 168 | sw $21, (UZ_S5*4)($27) |
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| 169 | sw $22, (UZ_S6*4)($27) |
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| 170 | sw $23, (UZ_S7*4)($27) |
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| 171 | sw $24, (UZ_T8*4)($27) |
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| 172 | sw $25, (UZ_T9*4)($27) |
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| 173 | sw $28, (UZ_GP*4)($27) |
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| 174 | sw $30, (UZ_S8*4)($27) |
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| 175 | sw $31, (UZ_RA*4)($27) |
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| 176 | |
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| 177 | mfc0 $16, $14 |
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| 178 | sw $16, (UZ_EPC*4)($27) # Save EPC |
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| 179 | mflo $14 |
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| 180 | sw $14, (UZ_LO*4)($27) # save LO |
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| 181 | mfhi $15 |
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| 182 | sw $15, (UZ_HI*4)($27) # save HI |
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| 183 | mfc0 $18, $12 |
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| 184 | sw $18, (UZ_SR*4)($27) # Save SR |
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| 185 | mfc0 $17, $13 |
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| 186 | sw $17, (UZ_CR*4)($27) # Save CR |
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| 187 | |
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[279] | 188 | # put SR in kernel mode, IRQ disabled, clear exl |
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| 189 | srl $3, $18, 5 |
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[16] | 190 | sll $3, $3, 5 |
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| 191 | mtc0 $3, $12 # Set new SR |
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| 192 | |
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| 193 | # signal that core enters kernel |
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[279] | 194 | la $1, cluster_core_kernel_enter |
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| 195 | jal $1 |
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[16] | 196 | nop |
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| 197 | |
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| 198 | #--------------------------------------------------------------------------------------- |
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[279] | 199 | # This code call the relevant Interrupt / Exception / Syscall handler, |
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| 200 | # depending on XCODE in CP0_CR, with the two following assumptions: |
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| 201 | # - $27 contains the pointer on uzone containing to save the core registers |
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| 202 | # - $29 contains the kernel stack pointer |
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| 203 | # The three handlers take the same two arguments: thread pointer and uzone pointer. |
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| 204 | # The uzone pointer is saved in $19 to be used by kernel_exit. |
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[16] | 205 | |
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[296] | 206 | mfc0 $17, $13 # $17 <= CR |
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| 207 | andi $17, $17, 0x3F # $17 <= XCODE |
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[279] | 208 | |
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[16] | 209 | mfc0 $4, $4, 2 # $4 <= thread pointer (first arg) |
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| 210 | or $5, $0, $27 # $5 <= uzone pointer (second arg) |
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[279] | 211 | or $19, $0, $27 # $19 <= &uzone (for kernel_exit) |
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[16] | 212 | |
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| 213 | ori $8, $0, 0x20 # $8 <= cause syscall |
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[296] | 214 | beq $8, $17, cause_sys # go to syscall handler |
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[16] | 215 | nop |
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[296] | 216 | beq $17, $0, cause_int # go to interrupt handler |
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[16] | 217 | nop |
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| 218 | |
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| 219 | cause_excp: |
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| 220 | la $1, hal_do_exception |
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| 221 | jalr $1 # call exception handler |
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| 222 | addiu $29, $29, -8 # hal_do_exception has 2 args |
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| 223 | addiu $29, $29, 8 |
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[279] | 224 | j kernel_exit # jump to kernel_exit |
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[16] | 225 | nop |
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| 226 | |
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| 227 | cause_sys: |
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| 228 | la $1, hal_do_syscall |
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| 229 | jalr $1 # call syscall handler |
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| 230 | addiu $29, $29, -8 # hal_do_syscall has 2 args |
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| 231 | addiu $29, $29, 8 |
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[279] | 232 | j kernel_exit # jump to kernel_exit |
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| 233 | nop |
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[16] | 234 | |
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| 235 | cause_int: |
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| 236 | la $1, hal_do_interrupt |
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| 237 | jalr $1 # call interrupt handler |
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| 238 | addiu $29, $29, -8 # hal_do_interrupt has 2 args |
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| 239 | addiu $29, $29, 8 |
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| 240 | |
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| 241 | # ----------------------------------------------------------------------------------- |
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[279] | 242 | # Kernel exit |
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| 243 | # The pointer on uzone is supposed to be stored in $19 |
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[16] | 244 | # ----------------------------------------------------------------------------------- |
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[279] | 245 | kernel_exit: |
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[16] | 246 | |
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| 247 | # signal that core exit kernel |
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[279] | 248 | la $1, cluster_core_kernel_exit |
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| 249 | jalr $1 |
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| 250 | nop |
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[16] | 251 | |
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| 252 | # restore context from uzone |
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| 253 | or $27, $0, $19 # $27 <= &uzone |
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| 254 | |
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| 255 | lw $29, (UZ_SP*4)($27) # restore SP from uzone |
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| 256 | lw $16, (UZ_EPC*4)($27) |
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| 257 | mtc0 $16, $14 # restore EPC from uzone |
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| 258 | lw $16, (UZ_HI*4)($27) |
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| 259 | mthi $16 # restore HI from uzone |
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| 260 | lw $16, (UZ_LO*4)($27) |
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| 261 | mtlo $16 # restore LO from uzone |
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| 262 | |
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| 263 | lw $17, (UZ_SR*4)($27) # get saved SR value from uzone |
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| 264 | andi $17, $17, 0x1F # keep only the 5 LSB bits |
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| 265 | mfc0 $26, $12 # get current SR value from CP0 |
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| 266 | or $26, $26, $17 # merge the two values |
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| 267 | mtc0 $26, $12 # setup new SR to CP0 |
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| 268 | |
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| 269 | lw $1, (UZ_AT*4)($27) |
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| 270 | lw $2, (UZ_V0*4)($27) |
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| 271 | lw $3, (UZ_V1*4)($27) |
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| 272 | lw $4, (UZ_A0*4)($27) |
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| 273 | lw $5, (UZ_A1*4)($27) |
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| 274 | lw $6, (UZ_A2*4)($27) |
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| 275 | lw $7, (UZ_A3*4)($27) |
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| 276 | lw $8, (UZ_T0*4)($27) |
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| 277 | lw $9, (UZ_T1*4)($27) |
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| 278 | lw $10, (UZ_T2*4)($27) |
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| 279 | lw $11, (UZ_T3*4)($27) |
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| 280 | lw $12, (UZ_T4*4)($27) |
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| 281 | lw $13, (UZ_T5*4)($27) |
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| 282 | lw $14, (UZ_T6*4)($27) |
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| 283 | lw $15, (UZ_T7*4)($27) |
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| 284 | lw $16, (UZ_S0*4)($27) |
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| 285 | lw $17, (UZ_S1*4)($27) |
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| 286 | lw $18, (UZ_S2*4)($27) |
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| 287 | lw $19, (UZ_S3*4)($27) |
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| 288 | lw $20, (UZ_S4*4)($27) |
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| 289 | lw $21, (UZ_S5*4)($27) |
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| 290 | lw $22, (UZ_S6*4)($27) |
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| 291 | lw $23, (UZ_S7*4)($27) |
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| 292 | lw $24, (UZ_T8*4)($27) |
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| 293 | lw $25, (UZ_T9*4)($27) |
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| 294 | lw $28, (UZ_GP*4)($27) |
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| 295 | lw $30, (UZ_S8*4)($27) |
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| 296 | lw $31, (UZ_RA*4)($27) |
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| 297 | |
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| 298 | lw $26, (UZ_DEXT*4)($27) |
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| 299 | mtc2 $26, $24 # restore CP2_DEXT from uzone |
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| 300 | |
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[279] | 301 | lw $26, (UZ_MODE*4)($27) |
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| 302 | mtc2 $26, $1 # restore CP2_MODE from uzone |
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[16] | 303 | |
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| 304 | nop |
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| 305 | eret |
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| 306 | |
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[279] | 307 | .end kernel_enter |
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[16] | 308 | .set reorder |
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| 309 | .set at |
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| 310 | |
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| 311 | #------------------------------------------------------------------------------- |
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| 312 | |
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