1 | /* |
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2 | * hal_kentry.h - uzone definition |
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3 | * |
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4 | * Author Alain Greiner (2016,2017,2018,2019) |
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5 | * |
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6 | * Copyright (c) UPMC Sorbonne Universites |
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7 | * |
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8 | * This file is part of ALMOS-MKH. |
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9 | * |
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10 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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11 | * under the terms of the GNU General Public License as published by |
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12 | * the Free Software Foundation; version 2.0 of the License. |
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13 | * |
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14 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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17 | * General Public License for more details. |
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18 | * |
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19 | * You should have received a copy of the GNU General Public License |
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20 | * along with ALMOS-kernel; if not, write to the Free Software Foundation, |
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21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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22 | */ |
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23 | |
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24 | #ifndef _HAL_KENTRY_H_ |
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25 | #define _HAL_KENTRY_H_ |
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26 | |
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27 | ////////////////////////////////////////////////////////////////////////////////////////// |
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28 | // This file defines the MIPS32 specific mnemonics to access the "uzone", that is |
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29 | // a fixed size array of 32 bits integers, used by the kentry function to save/restore |
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30 | // the MIPS32 CPU registers, at each exception / interruption / syscall. |
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31 | // |
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32 | // This file is included in the hal_kentry.S, hal_syscall.c, hal_exception.c, |
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33 | // and hal_context.c files. |
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34 | ////////////////////////////////////////////////////////////////////////////////////////// |
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35 | |
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36 | |
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37 | /**************************************************************************************** |
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38 | * This structure defines the "uzone" dynamically allocated in the kernel stack |
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39 | * by the hal_kentry assembly code to save the MIPS32 registers each time a core |
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40 | * enters the kernel to handle an interrupt, exception, or syscall. |
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41 | * These define are specific for the TSAR_MIPS32 architecture. |
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42 | * |
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43 | * WARNING : It is replicated in hal_kentry.S file. |
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44 | ***************************************************************************************/ |
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45 | |
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46 | #define UZ_MODE 0 /* c2_mode */ |
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47 | #define UZ_AT 1 /* at_01 */ |
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48 | #define UZ_V0 2 /* v0_02 */ |
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49 | #define UZ_V1 3 /* v1_03 */ |
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50 | #define UZ_A0 4 /* a0_04 */ |
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51 | #define UZ_A1 5 /* a1_05 */ |
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52 | #define UZ_A2 6 /* a2_06 */ |
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53 | #define UZ_A3 7 /* a3_07 */ |
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54 | #define UZ_T0 8 /* t0_08 */ |
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55 | #define UZ_T1 9 /* t1_09 */ |
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56 | #define UZ_T2 10 /* t2_10 */ |
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57 | #define UZ_T3 11 /* t3_11 */ |
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58 | #define UZ_T4 12 /* t4_12 */ |
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59 | #define UZ_T5 13 /* t5_13 */ |
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60 | #define UZ_T6 14 /* t6_14 */ |
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61 | #define UZ_T7 15 /* t7_15 */ |
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62 | #define UZ_S0 16 /* s0_16 */ |
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63 | #define UZ_S1 17 /* s1_17 */ |
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64 | #define UZ_S2 18 /* s2_18 */ |
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65 | #define UZ_S3 19 /* s3_19 */ |
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66 | #define UZ_S4 20 /* s4_20 */ |
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67 | #define UZ_S5 21 /* s5_21 */ |
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68 | #define UZ_S6 22 /* s6_22 */ |
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69 | #define UZ_S7 23 /* s7_23 */ |
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70 | #define UZ_T8 24 /* t8_24 */ |
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71 | #define UZ_T9 25 /* t9_25 */ |
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72 | |
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73 | #define UZ_LO 26 |
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74 | #define UZ_HI 27 |
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75 | |
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76 | #define UZ_GP 28 /* gp_28 */ |
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77 | #define UZ_SP 29 /* sp_29 */ |
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78 | #define UZ_S8 30 /* s8_30 */ |
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79 | #define UZ_RA 31 /* ra_31 */ |
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80 | |
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81 | #define UZ_PTPR 32 /* c2_ptpr */ |
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82 | #define UZ_EPC 33 /* c0_epc */ |
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83 | #define UZ_SR 34 /* c0_sr */ |
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84 | #define UZ_TH 35 /* c0_th */ |
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85 | #define UZ_CR 36 /* c0_cr */ |
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86 | |
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87 | #define UZ_REGS 37 |
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88 | |
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89 | /************************************************************************************* |
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90 | * The hal_kentry_enter() function is the unique kernel entry point in case of |
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91 | * exception, interrupt, or syscall for the TSAR_MIPS32 architecture. |
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92 | * It can be executed by a core in user mode or by a core already in kernel mode |
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93 | * (in case of interrupt or non fatal exception). |
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94 | * In both cases it allocates an "uzone" space in the kernel stack to save the |
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95 | * CPU registers values, desactivates the MMU, and calls the relevant handler |
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96 | * (exception/interrupt/syscall) |
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97 | * |
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98 | * After handler execution, it restores the CPU context from the uzone and jumps |
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99 | * to address contained in EPC calling the hal_kentry_eret() function. |
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100 | ************************************************************************************/ |
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101 | void hal_kentry_enter( void ); |
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102 | |
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103 | /************************************************************************************* |
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104 | * The hal_kentry_eret() function contains only the assembly "eret" instruction, |
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105 | * that reset the EXL bit in the c0_sr register, and jumps to the address |
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106 | * contained in the c0_epc register. |
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107 | * ************************************************************************************/ |
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108 | void hal_kentry_eret( void ); |
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109 | |
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110 | #endif /* _HAL_KENTRY_H_ */ |
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