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arch_classes.py @ 690

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[1]	1	#!/usr/bin/env python
	2
	3	import sys
	4
	5	##########################################################################################
	6	# File : arch_classes.py
	7	# Date : 2016
	8	# Author : Alain Greiner
	9	# Copyright (c) UPMC Sorbonne Universites
	10	#########################################################################################
	11	# This file contains the python classes required to define a generic hardware
	12	# architecture for the ALMOS-MK operating system.
	13	# It handle 4 types of objects: clusters, cores, devices and irqs.
	14	# - The number of cluster is variable (can be one).
[6]	15	# - The cluster topology can be a 2D mesh or a simple 1D array.
[1]	16	# - The number of cores per cluster is variable (can be zero).
	17	# - The number of addressable devices per cluster is variable.
	18	# - The size of the physical memory bank per cluster is variable.
	19	# An adressable device can be a physical memory bank or a peripheral.
	20	# Each cluster cover a fixed size segment in physical address space,
	21	# that is defined by (PADDR_WIDTH - X_WIDTH - Y_WIDTH)
	22	#########################################################################################
	23	# Implementation Note:
	24	# The objects used to describe an architecture are distributed in the python structure:
	25	# For example the set of cores and the set of devices are split in several subsets
	26	# (one subset of cores and one subset of devices per cluster).
	27	# In the generated C binary data structure, all objects of same type
	28	# are stored in a linear array (one single array for all cores for example).
	29	# For all objects, we compute and store in the python object a "global index"
	30	# corresponding to the index in this global array, and this index can be used as
	31	# a pseudo-pointer to identify a specific object of a given type.
	32	#########################################################################################
	33
	34	#########################################################################################
	35	# Define global parameters
	36	#########################################################################################
	37
	38	ARCHINFO_SIGNATURE = 0xBABE2016 # magic number indicating a valid C BLOB
	39	PAGE_SIZE = 0x1000 # to check peripherals alignment
	40
	41	#########################################################################################
	42	# These arrays define the supported types of peripherals.
[571]	43	# They must be kept consistent with values defined in file arch_info.h
[1]	44	#########################################################################################
	45
	46	DEVICE_TYPES_STR = [
[6]	47	'RAM_SCL', # 0.0
	48	'ROM_SCL', # 1.0
	49	'FBF_SCL', # 2.0
[586]	50	'FBF_LTI', # 2.1
[6]	51	'IOB_TSR', # 3.0
	52	'IOC_BDV', # 4.0
	53	'IOC_HBA', # 4.1
	54	'IOC_SDC', # 4.2
	55	'IOC_SPI', # 4.3
	56	'IOC_RDK', # 4.4
	57	'MMC_TSR', # 5.0
	58	'DMA_SCL', # 6.0
	59	'NIC_CBF', # 7.0
	60	'TIM_SCL', # 8.0
	61	'TXT_TTY', # 9.0
[586]	62	'TXT_RS2', # 9.1
	63	'TXT_MTY', # 9.2
[6]	64	'ICU_XCU', # A.0
	65	'PIC_TSR', # B.0
[1]	66	]
	67
	68	DEVICE_TYPES_INT = [
[6]	69	0x00000000, # 0.0
	70	0x00010000, # 1.0
[586]	71	0x00020000, # 2.0
	72	0x00020001, # 2.1
[6]	73	0x00030000, # 3.0
	74	0x00040000, # 4.0
	75	0x00040001, # 4.1
	76	0x00040002, # 4.2
	77	0x00040003, # 4.3
	78	0x00040004, # 4.4
	79	0x00050000, # 5.0
	80	0x00060000, # 6.0
	81	0x00070000, # 7.0
	82	0x00080000, # 8.0
	83	0x00090000, # 9.0
[534]	84	0x00090001, # 9.1
[586]	85	0x00090002, # 9.2
[6]	86	0x000A0000, # A.0
	87	0x000B0000, # B.0
[1]	88	]
	89
[586]	90	#########################################################################################
[1]	91	class Archinfo( object ):
	92	#########################################################################################
	93	def __init__( self,
	94	name, # architecture instance name
	95	x_size, # number of clusters in a row
	96	y_size, # number of clusters in a column
	97	cores_max, # max number of cores per cluster
	98	devices_max, # max number of devices per cluster
	99	paddr_width, # number of bits in physical address
	100	x_width, # number of bits for x coordinate
	101	y_width, # number of bits for y coordinate
[6]	102	irqs_per_core, # number or IRQs from ICU to one core
[1]	103	io_cxy, # IO cluster identifier
	104	boot_cxy, # boot cluster identifier
	105	cache_line, # number of bytes in cache line
	106	reset_address, # Preloader physical base address
[687]	107	p_width, # TSAR specific : number of bits to code core lid
	108	sys_clk ): # system clock frequency (in Hertz)
[1]	109
	110	assert ( x_size <= (1<<x_width) )
	111	assert ( y_size <= (1<<y_width) )
	112
	113	self.signature = ARCHINFO_SIGNATURE
	114	self.name = name
	115	self.x_size = x_size
	116	self.y_size = y_size
	117	self.cores_max = cores_max
	118	self.devices_max = devices_max
	119	self.paddr_width = paddr_width
	120	self.x_width = x_width
	121	self.y_width = y_width
	122	self.irqs_per_core = irqs_per_core
	123	self.io_cxy = io_cxy
	124	self.boot_cxy = boot_cxy
	125	self.cache_line = cache_line
	126	self.reset_address = reset_address
	127	self.p_width = p_width
[687]	128	self.sys_clk = sys_clk
[1]	129
	130	self.total_cores = 0
	131	self.total_devices = 0
	132	self.total_irqs = 0
	133
	134	self.clusters = []
	135
	136	for x in xrange( self.x_size ):
	137	for y in xrange( self.y_size ):
	138
	139	# call cluster constructor
	140	cxy = (x<<y_width) + y
	141	cluster = Cluster( cxy )
	142
	143	# update cluster global index
	144	cluster.index = (x * self.y_size) + y
	145
	146	# register cluster in Archinfo
	147	self.clusters.append( cluster )
	148
	149	return
	150
	151	########################## add a device in a cluster
	152	def addDevice( self,
	153	ptype, # device type
	154	base, # associated pseg base address
	155	size, # associated pseg length (bytes)
	156	channels = 1, # number of channels
	157	arg0 = 0, # optional argument (semantic depends on ptype)
	158	arg1 = 0, # optional argument (semantic depends on ptype)
	159	arg2 = 0, # optional argument (semantic depends on ptype)
	160	arg3 = 0 ): # optional argument (semantic depends on ptype)
	161
	162	# computes cluster identifier and global index from the base address
	163	cxy = base >> (self.paddr_width - self.x_width - self.y_width)
	164	x = cxy >> (self.y_width);
	165	y = cxy & ((1 << self.y_width) - 1)
	166	cluster_id = (x * self.y_size) + y
	167
	168	assert (x < self.x_size) and (y < self.y_size)
	169	assert (base & (PAGE_SIZE-1) == 0)
	170	assert (ptype in DEVICE_TYPES_STR)
	171
	172	# call device constructor
	173	device = Device( base, size, ptype, channels, arg0, arg1, arg2, arg3 )
	174
	175	# register device in cluster
	176	self.clusters[cluster_id].devices.append( device )
	177
	178	# update device global index
	179	device.index = self.total_devices
	180	self.total_devices += 1
	181
	182	return device
	183
	184	################################ add an input IRQ in a device
	185	def addIrq( self,
[6]	186	dstdev, # destination device (PIC or ICU)
[1]	187	port, # input IRQ port index
	188	srcdev, # source device
	189	channel = 0, # source device channel
	190	is_rx = False ): # I/O operation direction
	191
[6]	192	assert (dstdev.ptype == 'ICU_XCU') or (dstdev.ptype == 'PIC_TSR')
[1]	193	assert (port < dstdev.arg0)
	194
	195	# call Irq constructor
	196	irq = Irq( port , srcdev, channel , is_rx )
	197
	198	# register IRQ in destination device
	199	dstdev.irqs.append( irq )
	200
	201	# update IRQ global index
	202	irq.index = self.total_irqs
	203	self.total_irqs += 1
	204
	205	# pointer from the source to the interrupt controller device
	206	if (srcdev.irq_ctrl == None): srcdev.irq_ctrl = dstdev
	207
	208	if (srcdev.irq_ctrl != dstdev):
	209	print '[genarch error] in addIrq():'
	210	print ' two different interrupt controller for the same device'
	211	sys.exit(1)
	212
	213	return irq
	214
	215	########################## add a core in a cluster
	216	def addCore( self,
	217	gid, # global hardware identifier
	218	cxy, # cluster identifier
	219	lid ): # local index in cluster
	220
	221	assert ((cxy >> self.y_width) < self.x_size)
	222	assert ((cxy & ((1<<self.y_width)-1)) < self.y_size)
	223	assert (lid < self.cores_max)
	224
	225	# call Core contructor
	226	core = Core( gid, cxy, lid )
	227
	228	# compute cluster global index from cluster identifier
	229	x = cxy>>self.y_width
	230	y = cxy & ((1<<self.y_width)-1)
	231	cluster_id = (x * self.y_size) + y
	232
	233	# register core in cluster
	234	self.clusters[cluster_id].cores.append( core )
	235
	236	# update core global index
	237	core.index = self.total_cores
	238	self.total_cores += 1
	239
	240	return core
	241
	242	#################################
	243	def str2bytes( self, nbytes, s ): # string => nbytes_packed byte array
	244
	245	byte_stream = bytearray()
	246	length = len( s )
	247	if length < (nbytes - 1):
	248	for b in s:
	249	byte_stream.append( b )
	250	for x in xrange(nbytes-length):
	251	byte_stream.append( '\0' )
	252	else:
	253	print '[genarch error] in str2bytes()'
	254	print ' string %s too long' % s
	255	sys.exit(1)
	256
	257	return byte_stream
	258
	259	###################################
	260	def int2bytes( self, nbytes, val ): # integer => nbytes litle endian byte array
	261
	262	byte_stream = bytearray()
	263	for n in xrange( nbytes ):
	264	byte_stream.append( (val >> (n<<3)) & 0xFF )
	265
	266	return byte_stream
	267
	268	################
	269	def xml( self ): # compute string for xml file generation
	270
	271	s = '<?xml version="1.0"?>\n\n'
	272	s += '<arch_info signature = "0x%x"\n' % (self.signature)
	273	s += ' name = "%s"\n' % (self.name)
	274	s += ' x_size = "%d"\n' % (self.x_size)
	275	s += ' y_size = "%d"\n' % (self.y_size)
	276	s += ' cores = "%d"\n' % (self.cores_max)
[687]	277	s += ' io_cxy = "%d"\n' % (self.io_cxy)
	278	s += ' sys_clk = "%d" >\n' % (self.sys_clk)
[1]	279	s += '\n'
	280
	281	s += ' <clusterset>\n'
	282	for x in xrange ( self.x_size ):
	283	for y in xrange ( self.y_size ):
	284	cluster_id = (x * self.y_size) + y
	285	s += self.clusters[cluster_id].xml()
	286	s += ' </clusterset>\n'
	287	s += '\n'
	288
	289	s += '</arch_info>\n'
	290	return s
	291
	292	##########################
	293	def cbin( self, verbose ): # C binary structure for "archinfo.bin" file generation
	294
	295	byte_stream = bytearray()
	296
	297	# header
	298	byte_stream += self.int2bytes(4, self.signature)
	299	byte_stream += self.int2bytes(4, self.x_size)
	300	byte_stream += self.int2bytes(4, self.y_size)
	301	byte_stream += self.int2bytes(4, self.paddr_width)
	302	byte_stream += self.int2bytes(4, self.x_width)
	303	byte_stream += self.int2bytes(4, self.y_width)
	304	byte_stream += self.int2bytes(4, self.cores_max)
	305	byte_stream += self.int2bytes(4, self.devices_max)
	306
	307	byte_stream += self.int2bytes(4, self.total_cores)
	308	byte_stream += self.int2bytes(4, self.total_devices)
	309	byte_stream += self.int2bytes(4, self.total_irqs)
	310	byte_stream += self.int2bytes(4, self.io_cxy)
	311	byte_stream += self.int2bytes(4, self.boot_cxy)
	312	byte_stream += self.int2bytes(4, self.irqs_per_core)
	313	byte_stream += self.int2bytes(4, self.cache_line)
[687]	314	byte_stream += self.int2bytes(4, self.sys_clk)
[1]	315
	316	byte_stream += self.str2bytes(64, self.name)
	317
	318	if ( verbose ):
	319	print '\n'
	320	print 'name = %s' % self.name
	321	print 'signature = %x' % self.signature
	322	print 'x_size = %d' % self.x_size
	323	print 'y_size = %d' % self.y_size
	324	print 'total_cores = %d' % self.total_cores
	325	print 'total_devices = %d' % self.total_devices
	326	print 'total_irqs = %d' % self.total_irqs
	327	print '\n'
	328
	329	# cores array
	330	index = 0
	331	for cluster in self.clusters:
	332	for core in cluster.cores:
	333	byte_stream += core.cbin( self, verbose, index )
	334	index += 1
	335
	336	if ( verbose ): print '\n'
	337
	338	# clusters array
	339	index = 0
	340	for cluster in self.clusters:
	341	byte_stream += cluster.cbin( self, verbose, index )
	342	index += 1
	343
	344	if ( verbose ): print '\n'
	345
	346	# devices array
	347	index = 0
	348	for cluster in self.clusters:
	349	for device in cluster.devices:
	350	byte_stream += device.cbin( self, verbose, index )
	351	index += 1
	352
	353	if ( verbose ): print '\n'
	354
	355	# irqs array
	356	index = 0
	357	for cluster in self.clusters:
	358	for device in cluster.devices:
	359	for irq in device.irqs:
	360	byte_stream += irq.cbin( self, verbose, index )
	361	index += 1
	362
	363	if ( verbose ): print '\n'
	364
	365	return byte_stream
	366	# end of cbin()
	367
	368
	369	######################################################################
[571]	370	def hard_config( self ): # compute string for hard_config.h file
[1]	371	# required by
	372	# - top.cpp compilation
[687]	373	# - almos-mkh bootloader compilation
[1]	374	# - tsar_preloader compilation
	375
	376	# for each device type, define default values
	377	# for pbase address, size, number of components, and channels
	378	nb_ram = 0
	379	ram_channels = 0
	380	ram_base = 0xFFFFFFFFFFFFFFFF
	381	ram_size = 0
	382
[6]	383	nb_rom = 0
	384	rom_channels = 0
	385	rom_base = 0xFFFFFFFFFFFFFFFF
	386	rom_size = 0
[1]	387
	388	nb_fbf = 0
	389	fbf_channels = 0
	390	fbf_base = 0xFFFFFFFFFFFFFFFF
	391	fbf_size = 0
	392	fbf_arg0 = 0
	393	fbf_arg1 = 0
[586]	394	use_fbf_scl = False
	395	use_fbf_lti = False
[1]	396
	397	nb_iob = 0
	398	iob_channels = 0
	399	iob_base = 0xFFFFFFFFFFFFFFFF
	400	iob_size = 0
	401
	402	nb_ioc = 0
	403	ioc_channels = 0
	404	ioc_base = 0xFFFFFFFFFFFFFFFF
	405	ioc_size = 0
	406	use_ioc_bdv = False
	407	use_ioc_sdc = False
	408	use_ioc_hba = False
	409	use_ioc_spi = False
	410	use_ioc_rdk = False
	411
	412	nb_mmc = 0
	413	mmc_channels = 0
	414	mmc_base = 0xFFFFFFFFFFFFFFFF
	415	mmc_size = 0
	416
[6]	417	nb_dma = 0
	418	dma_channels = 0
	419	dma_base = 0xFFFFFFFFFFFFFFFF
	420	dma_size = 0
[1]	421
	422	nb_nic = 0
	423	nic_channels = 0
	424	nic_base = 0xFFFFFFFFFFFFFFFF
	425	nic_size = 0
	426
	427	nb_sim = 0
	428	sim_channels = 0
	429	sim_base = 0xFFFFFFFFFFFFFFFF
	430	sim_size = 0
	431
	432	nb_tim = 0
	433	tim_channels = 0
	434	tim_base = 0xFFFFFFFFFFFFFFFF
	435	tim_size = 0
	436
[6]	437	nb_txt = 0
	438	txt_channels = 0
	439	txt_base = 0xFFFFFFFFFFFFFFFF
	440	txt_size = 0
[586]	441	use_txt_tty = False
	442	use_txt_rs2 = False
	443	use_txt_mty = False
[1]	444
[6]	445	nb_icu = 0
	446	icu_channels = 0
	447	icu_base = 0xFFFFFFFFFFFFFFFF
	448	icu_size = 0
	449	icu_arg0 = 0
[1]	450
[6]	451	nb_pic = 0
	452	pic_channels = 0
	453	pic_base = 0xFFFFFFFFFFFFFFFF
	454	pic_size = 0
[1]	455
[6]	456	nb_rom = 0
	457	rom_channels = 0
	458	rom_base = 0xFFFFFFFFFFFFFFFF
	459	rom_size = 0
	460
[1]	461	# get devices attributes
	462	for cluster in self.clusters:
	463	for device in cluster.devices:
	464
[6]	465	if ( device.ptype == 'RAM_SCL' ):
[1]	466	ram_base = device.base
	467	ram_size = device.size
	468	ram_channels = device.channels
	469	nb_ram +=1
	470
[6]	471	elif ( device.ptype == 'ROM_SCL' ):
	472	rom_base = device.base
	473	rom_size = device.size
	474	rom_channels = device.channels
	475	nb_rom +=1
[1]	476
[6]	477	elif ( device.ptype == 'FBF_SCL' ):
[1]	478	fbf_base = device.base
	479	fbf_size = device.size
	480	fbf_channels = device.channels
[586]	481	use_fbf_scl = True
[1]	482	fbf_arg0 = device.arg0
	483	fbf_arg1 = device.arg1
	484	nb_fbf +=1
[586]	485	elif ( device.ptype == 'FBF_LTI' ):
	486	fbf_base = device.base
	487	fbf_size = device.size
	488	fbf_channels = device.channels
	489	use_fbf_lti = True
	490	fbf_arg0 = device.arg0
	491	fbf_arg1 = device.arg1
	492	nb_fbf +=1
[1]	493
[6]	494	elif ( device.ptype == 'IOB_TSR' ):
[1]	495	iob_base = device.base
	496	iob_size = device.size
	497	iob_channels = device.channels
	498	nb_iob +=1
	499
	500	elif ( device.ptype == 'IOC_BDV' ):
	501	ioc_base = device.base
	502	ioc_size = device.size
	503	ioc_channels = device.channels
	504	use_ioc_bdv = True
	505	nb_ioc += 1
	506	elif ( device.ptype == 'IOC_HBA' ):
	507	ioc_base = device.base
	508	ioc_size = device.size
	509	ioc_channels = device.channels
	510	use_ioc_hba = True
	511	nb_ioc += 1
	512	elif ( device.ptype == 'IOC_SDC' ):
	513	ioc_base = device.base
	514	ioc_size = device.size
	515	ioc_channels = device.channels
	516	use_ioc_sdc = True
	517	nb_ioc += 1
	518	elif ( device.ptype == 'IOC_SPI' ):
	519	ioc_base = device.base
	520	ioc_size = device.size
	521	ioc_channels = device.channels
	522	use_ioc_spi = True
	523	nb_ioc += 1
	524	elif ( device.ptype == 'IOC_RDK' ):
	525	ioc_base = device.base
	526	ioc_size = device.size
	527	ioc_channels = device.channels
	528	use_ioc_rdk = True
	529	nb_ioc += 1
	530
[6]	531	elif ( device.ptype == 'MMC_TSR' ):
[1]	532	mmc_base = device.base
	533	mmc_size = device.size
	534	mmc_channels = device.channels
	535	nb_mmc +=1
	536
[6]	537	elif ( device.ptype == 'DMA_SCL' ):
	538	dma_base = device.base
	539	dma_size = device.size
	540	dma_channels = device.channels
	541	nb_dma +=1
[1]	542
[6]	543	elif ( device.ptype == 'NIC_CBF' ):
[1]	544	nic_base = device.base
	545	nic_size = device.size
	546	nic_channels = device.channels
	547	nb_nic +=1
	548
[6]	549	elif ( device.ptype == 'TIM_SCL' ):
[1]	550	tim_base = device.pseg.base
	551	tim_size = device.pseg.size
	552	tim_channels = device.channels
	553	nb_tim +=1
	554
[6]	555	elif ( device.ptype == 'TXT_TTY' ):
	556	txt_base = device.base
	557	txt_size = device.size
	558	txt_channels = device.channels
[586]	559	use_txt_tty = True
[6]	560	nb_txt +=1
[586]	561	elif ( device.ptype == 'TXT_RS2' ):
	562	txt_base = device.base
	563	txt_size = device.size
	564	txt_channels = device.channels
	565	use_txt_rs2 = True
	566	nb_txt +=1
	567	elif ( device.ptype == 'TXT_MTY' ):
	568	txt_base = device.base
	569	txt_size = device.size
	570	txt_channels = device.channels
	571	use_txt_mty = True
	572	nb_txt +=1
[1]	573
[6]	574	elif ( device.ptype == 'ICU_XCU' ):
	575	icu_base = device.base
	576	icu_size = device.size
	577	icu_channels = device.channels
	578	icu_arg0 = device.arg0
	579	icu_arg1 = device.arg1
	580	icu_arg2 = device.arg2
	581	icu_arg3 = device.arg3
	582	nb_icu +=1
[1]	583
[6]	584	elif ( device.ptype == 'PIC_TSR' ):
	585	pic_base = device.base
	586	pic_size = device.size
	587	pic_channels = device.channels
	588	nb_pic +=1
[1]	589
	590	# one and only one IOC controller
[571]	591	assert ( nb_ioc == 1 )
[1]	592
	593	# compute rdk_base and rdk_size
	594	if( use_ioc_rdk ):
	595	rdk_base = ioc_base
	596	rdk_size = ioc_size
	597	else:
	598	rdk_base = 0
	599	rdk_size = 0
	600
	601	# Compute total number of cores, devices and irqs
	602	nb_total_cores = self.total_cores
	603	nb_total_devices = self.total_devices
	604	nb_total_irqs = self.total_irqs
	605
	606	# boot core has (cxy == boot_cxy) and (lid == 0)
	607	for cluster in self.clusters:
	608	if( cluster.cxy == self.boot_cxy ): boot_core_gid = cluster.cores[0].gid
	609
	610	# compute mask to get local physical address (cluster independant)
	611	local_paddr_width = self.paddr_width - self.x_width - self.y_width
	612	local_physical_mask = (1<<local_paddr_width)-1
	613
	614	# build string
	615	s = '/* Generated by genarch for %s */\n' % self.name
	616	s += '\n'
	617	s += '#ifndef HARD_CONFIG_H\n'
	618	s += '#define HARD_CONFIG_H\n'
	619	s += '\n'
	620
	621	s += '/* General platform parameters */\n'
	622	s += '\n'
	623	s += '#define X_SIZE %d\n' % self.x_size
	624	s += '#define Y_SIZE %d\n' % self.y_size
	625	s += '#define PADDR_WIDTH %d\n' % self.paddr_width
	626	s += '#define X_WIDTH %d\n' % self.x_width
	627	s += '#define Y_WIDTH %d\n' % self.y_width
	628	s += '#define P_WIDTH %d\n' % self.p_width
	629	s += '#define X_IO %d\n' % (self.io_cxy >> self.y_width)
	630	s += '#define Y_IO %d\n' % (self.io_cxy & ((1<<self.y_width)-1))
	631	s += '#define NB_PROCS_MAX %d\n' % self.cores_max
	632	s += '#define NB_DEVICES_MAX %d\n' % self.devices_max
	633	s += '#define IRQ_PER_PROCESSOR %d\n' % self.irqs_per_core
	634	s += '#define RESET_ADDRESS 0x%x\n' % self.reset_address
	635	s += '#define NB_TOTAL_PROCS %d\n' % nb_total_cores
	636	s += '#define BOOT_CORE_GID %d\n' % boot_core_gid
	637	s += '#define BOOT_CORE_CXY %d\n' % self.boot_cxy
	638	s += '#define CACHE_LINE_SIZE %d\n' % self.cache_line
[687]	639	s += '#define SYS_CLK %d\n' % self.sys_clk
[1]	640	s += '\n'
	641
	642	s += '/* Peripherals */\n'
	643	s += '\n'
[6]	644	s += '#define NB_TXT_CHANNELS %d\n' % txt_channels
[1]	645	s += '#define NB_IOC_CHANNELS %d\n' % ioc_channels
	646	s += '#define NB_NIC_CHANNELS %d\n' % nic_channels
	647	s += '#define NB_TIM_CHANNELS %d\n' % tim_channels
	648	s += '\n'
[6]	649	s += '#define USE_ICU %d\n' % ( nb_icu != 0 )
[1]	650	s += '#define USE_IOB %d\n' % ( nb_iob != 0 )
	651	s += '#define USE_PIC %d\n' % ( nb_pic != 0 )
	652	s += '#define USE_FBF %d\n' % ( nb_fbf != 0 )
	653	s += '#define USE_NIC %d\n' % ( nb_nic != 0 )
[6]	654	s += '#define USE_DMA %d\n' % ( nb_dma != 0 )
[1]	655	s += '\n'
[571]	656	s += '#define USE_IOC_BDV %d\n' % use_ioc_bdv
	657	s += '#define USE_IOC_SDC %d\n' % use_ioc_sdc
	658	s += '#define USE_IOC_HBA %d\n' % use_ioc_hba
	659	s += '#define USE_IOC_SPI %d\n' % use_ioc_spi
[1]	660	s += '#define USE_IOC_RDK %d\n' % use_ioc_rdk
	661	s += '\n'
[586]	662	s += '#define USE_TXT_TTY %d\n' % use_txt_tty
	663	s += '#define USE_TXT_RS2 %d\n' % use_txt_rs2
	664	s += '#define USE_TXT_MTY %d\n' % use_txt_mty
	665	s += '\n'
	666	s += '#define USE_FBF_SCL %d\n' % use_fbf_scl
	667	s += '#define USE_FBF_LTI %d\n' % use_fbf_lti
	668	s += '\n'
[1]	669	s += '#define FBUF_X_SIZE %d\n' % fbf_arg0
	670	s += '#define FBUF_Y_SIZE %d\n' % fbf_arg1
	671	s += '\n'
[6]	672	s += '#define ICU_NB_HWI %d\n' % icu_arg0
	673	s += '#define ICU_NB_PTI %d\n' % icu_arg1
	674	s += '#define ICU_NB_WTI %d\n' % icu_arg2
	675	s += '#define ICU_NB_OUT %d\n' % icu_arg3
[1]	676	s += '\n'
	677
	678	s += '/* local physical base address and size for devices */\n'
	679	s += '\n'
	680	s += '#define SEG_RAM_BASE 0x%x\n' % (ram_base & local_physical_mask)
	681	s += '#define SEG_RAM_SIZE 0x%x\n' % ram_size
	682	s += '\n'
	683	s += '#define SEG_FBF_BASE 0x%x\n' % (fbf_base & local_physical_mask)
	684	s += '#define SEG_FBF_SIZE 0x%x\n' % fbf_size
	685	s += '\n'
	686	s += '#define SEG_IOB_BASE 0x%x\n' % (iob_base & local_physical_mask)
	687	s += '#define SEG_IOB_SIZE 0x%x\n' % iob_size
	688	s += '\n'
	689	s += '#define SEG_IOC_BASE 0x%x\n' % (ioc_base & local_physical_mask)
	690	s += '#define SEG_IOC_SIZE 0x%x\n' % ioc_size
	691	s += '\n'
	692	s += '#define SEG_MMC_BASE 0x%x\n' % (mmc_base & local_physical_mask)
	693	s += '#define SEG_MMC_SIZE 0x%x\n' % mmc_size
	694	s += '\n'
[6]	695	s += '#define SEG_DMA_BASE 0x%x\n' % (dma_base & local_physical_mask)
	696	s += '#define SEG_DMA_SIZE 0x%x\n' % dma_size
[1]	697	s += '\n'
	698	s += '#define SEG_ROM_BASE 0x%x\n' % (rom_base & local_physical_mask)
	699	s += '#define SEG_ROM_SIZE 0x%x\n' % rom_size
	700	s += '\n'
	701	s += '#define SEG_SIM_BASE 0x%x\n' % (sim_base & local_physical_mask)
	702	s += '#define SEG_SIM_SIZE 0x%x\n' % sim_size
	703	s += '\n'
	704	s += '#define SEG_NIC_BASE 0x%x\n' % (nic_base & local_physical_mask)
	705	s += '#define SEG_NIC_SIZE 0x%x\n' % nic_size
	706	s += '\n'
	707	s += '#define SEG_PIC_BASE 0x%x\n' % (pic_base & local_physical_mask)
	708	s += '#define SEG_PIC_SIZE 0x%x\n' % pic_size
	709	s += '\n'
	710	s += '#define SEG_TIM_BASE 0x%x\n' % (tim_base & local_physical_mask)
	711	s += '#define SEG_TIM_SIZE 0x%x\n' % tim_size
	712	s += '\n'
[6]	713	s += '#define SEG_TXT_BASE 0x%x\n' % (txt_base & local_physical_mask)
	714	s += '#define SEG_TXT_SIZE 0x%x\n' % txt_size
[1]	715	s += '\n'
[6]	716	s += '#define SEG_ICU_BASE 0x%x\n' % (icu_base & local_physical_mask)
	717	s += '#define SEG_ICU_SIZE 0x%x\n' % icu_size
[1]	718	s += '\n'
	719	s += '#define SEG_RDK_BASE 0x%x\n' % (rdk_base & local_physical_mask)
	720	s += '#define SEG_RDK_SIZE 0x%x\n' % rdk_size
	721	s += '\n'
	722	s += '#endif\n'
	723
	724	return s
	725
	726	# end of hard_config()
	727
	728
	729
	730
	731
	732	###################################################################################
	733	class Cluster ( object ):
	734	###################################################################################
	735	def __init__( self,
	736	cxy ):
	737
	738	self.index = 0 # global index (set by Archinfo constructor)
	739	self.cxy = cxy # cluster identifier
	740	self.cores = [] # local cores (filled by addCore)
	741	self.devices = [] # local devices(filled by addDevice)
	742
	743	return
	744
	745	################
	746	def xml( self ): # xml for a cluster
	747
	748	s = ' <cluster cxy = "%x" >\n' % (self.cxy)
	749	for core in self.cores: s += core.xml()
	750	for device in self.devices: s += device.xml()
	751	s += ' </cluster>\n'
	752
	753	return s
	754
	755	#############################################
	756	def cbin( self, mapping, verbose, expected ): # C binary structure for Cluster
	757
	758	if ( verbose ):
	759	print '*** cbin for cluster[%d] / identifier = %x' \
	760	% (self.index , self.cxy)
	761
	762	# check index
	763	if (self.index != expected):
	764	print '[genarch error] in Cluster.cbin()'
	765	print ' cluster global index = %d / expected = %d' \
	766	% (self.index,expected)
	767	sys.exit(1)
	768
	769	# compute global index for first core in cluster
	770	if ( len(self.cores) > 0 ):
	771	core_id = self.cores[0].index
	772	else:
	773	core_id = 0
	774
	775	# compute global index for first device in cluster
	776	if ( len(self.devices) > 0 ):
	777	device_id = self.devices[0].index
	778	else:
	779	device_id = 0
	780
	781	byte_stream = bytearray()
	782	byte_stream += mapping.int2bytes(4,self.cxy) # cxy
	783	byte_stream += mapping.int2bytes(4,len(self.cores)) # cores in cluster
	784	byte_stream += mapping.int2bytes(4,core_id ) # first core global index
	785	byte_stream += mapping.int2bytes(4,len(self.devices)) # devices in cluster
	786	byte_stream += mapping.int2bytes(4, device_id ) # first device global index
	787
	788	if ( verbose ):
	789	print 'nb_cores = %d' % len( self.cores )
	790	print 'core_id = %d' % core_id
	791	print 'nb_devices = %d' % len( self.devices )
	792	print 'device_id = %d' % device_id
	793
	794	return byte_stream
	795
	796
	797
	798
	799	##################################################################################
	800	class Core ( object ):
	801	##################################################################################
	802	def __init__( self,
	803	gid,
	804	cxy,
	805	lid ):
	806
	807	self.index = 0 # global index / set by addProc()
	808	self.gid = gid # hardware identifier
	809	self.cxy = cxy # cluster identifier
	810	self.lid = lid # local index in cluster
	811
	812	return
	813
	814	###################################
	815	def xml( self ): # xml for a core
	816	return ' <core gid="%x" lid="%d" />\n' % (self.gid, self.lid)
	817
	818	####################################################################
	819	def cbin( self, mapping, verbose, expected ): # C binary for Proc
	820
	821	if ( verbose ):
	822	print '*** cbin for core [%d] in cluster %x' \
	823	% (self.lid, self.cxy)
	824
	825	# check index
	826	if (self.index != expected):
	827	print '[genarch error] in Core.cbin()'
	828	print ' core global index = %d / expected = %d' \
	829	% (self.index,expected)
	830	sys.exit(1)
	831
	832	byte_stream = bytearray()
	833	byte_stream += mapping.int2bytes( 4 , self.gid ) # hardware identifier
	834	byte_stream += mapping.int2bytes( 2 , self.cxy ) # cluster identifier
	835	byte_stream += mapping.int2bytes( 2 , self.lid ) # local index
	836
	837	return byte_stream
	838
	839
	840
	841
	842	##################################################################################
	843	class Device ( object ):
	844	##################################################################################
	845	def __init__( self,
	846	base,
	847	size,
	848	ptype,
	849	channels = 1,
	850	arg0 = 0,
	851	arg1 = 0,
	852	arg2 = 0,
	853	arg3 = 0 ):
	854
	855	self.index = 0 # global device index ( set by addDevice() )
	856	self.base = base # associated segment base
	857	self.size = size # associated segment size (bytes)
	858	self.ptype = ptype # device type
	859	self.channels = channels # number of channels
	860	self.arg0 = arg0 # optional (semantic depends on ptype)
	861	self.arg1 = arg1 # optional (semantic depends on ptype)
	862	self.arg2 = arg2 # optional (semantic depends on ptype)
	863	self.arg3 = arg3 # optional (semantic depends on ptype)
[6]	864	self.irqs = [] # set of input IRQs (for PIC and ICU only)
[1]	865	self.irq_ctrl = None # interrupt controller for this device
	866	return
	867
	868	######################################
	869	def xml( self ): # xml for a device
	870
	871	s = ' <device type="%s"' % self.ptype
	872	s += ' base="%x"' % self.base
	873	s += ' size="%x"' % self.size
	874	s += ' channels="%d"' % self.channels
	875	s += ' arg0="%d"' % self.arg0
	876	s += ' arg1="%d"' % self.arg1
	877	s += ' arg2="%d"' % self.arg2
	878	s += ' arg3="%d"' % self.arg3
[6]	879	if ( (self.ptype == 'PIC_TSR') or (self.ptype == 'ICU_XCU') ):
[1]	880	s += ' >\n'
	881	for irq in self.irqs: s += irq.xml()
	882	s += ' </device>\n'
	883	else:
	884	s += ' />\n'
	885	return s
	886
	887	######################################################################
	888	def cbin( self, mapping, verbose, expected ): # C binary for Periph
	889
	890	if ( verbose ):
[6]	891	print '*** cbin for device[%d] / type = %s / base = %x' \
	892	% (self.index , self.ptype , self.base)
[1]	893
	894	# check index
	895	if (self.index != expected):
	896	print '[genarch error] in Periph.cbin()'
	897	print ' device global index = %d / expected = %d' \
	898	% (self.index,expected)
	899	sys.exit(1)
	900
	901	# compute first irq global index
	902	if ( len(self.irqs) > 0 ):
	903	irq_id = self.irqs[0].index
	904	else:
	905	irq_id = 0
	906
	907	# compute device type numerical value
	908	ptype_id = 0xFFFFFFFF
	909	for x in xrange( len(DEVICE_TYPES_STR) ):
	910	if ( self.ptype == DEVICE_TYPES_STR[x] ): ptype_id = DEVICE_TYPES_INT[x]
	911
	912	if ( ptype_id == 0xFFFFFFFF ):
	913	print '[genarch error] in Device.cbin()'
	914	print ' undefined device type %s' % self.ptype
	915	sys.exit(1)
	916
	917	byte_stream = bytearray()
	918	byte_stream += mapping.int2bytes(8,self.base) # segment base address
	919	byte_stream += mapping.int2bytes(8,self.size) # segment size
[6]	920	byte_stream += mapping.int2bytes(4,ptype_id) # device type
[1]	921	byte_stream += mapping.int2bytes(4,self.channels) # number of channels
	922	byte_stream += mapping.int2bytes(4,self.arg0) # optionnal arg0
	923	byte_stream += mapping.int2bytes(4,self.arg1) # optionnal arg1
	924	byte_stream += mapping.int2bytes(4,self.arg2) # optionnal arg2
	925	byte_stream += mapping.int2bytes(4,self.arg3) # optionnal arg3
	926	byte_stream += mapping.int2bytes(4,len(self.irqs)) # number of input irqs
	927	byte_stream += mapping.int2bytes(4 ,irq_id) # first irq global index
	928
	929	if ( verbose ):
	930	print 'base = %x' % self.base
	931	print 'size = %x' % self.size
	932	print 'nb_irqs = %d' % len( self.irqs )
	933	print 'irq_id = %d' % irq_id
	934
	935	return byte_stream
	936
	937	##################################################################################
	938	class Irq ( object ):
	939	##################################################################################
	940	def __init__( self,
	941	port,
	942	dev,
	943	channel,
	944	is_rx ):
	945
	946	assert port < 32
	947
	948	self.index = 0 # global index ( set by addIrq() )
	949	self.port = port # input IRQ port index
	950	self.dev = dev # source device
	951	self.channel = channel # source device channel
	952	self.is_rx = is_rx # source device direction
	953
	954	return
	955
	956	################################
	957	def xml( self ): # xml for Irq
	958	s = ' <irq port="%d" devtype="%s" channel="%d" is_rx="%d" />\n' \
	959	% ( self.port, self.dev.ptype, self.channel, self.is_rx )
	960	return s
	961
	962	####################################################################
	963	def cbin( self, mapping, verbose, expected ): # C binary for Irq
	964
	965	if ( verbose ):
[6]	966	print '*** cbin for irq[%d] / src_dev = %s' \
	967	% (self.port , self.dev.ptype)
[1]	968
	969	# check index
	970	if (self.index != expected):
	971	print '[genarch error] in Irq.cbin()'
	972	print ' irq global index = %d / expected = %d' \
[6]	973	% (self.index , expected)
[1]	974	# compute source device type numerical value
	975	dev_id = 0xFFFFFFFF
	976	for x in xrange( len(DEVICE_TYPES_STR) ):
	977	if ( self.dev.ptype == DEVICE_TYPES_STR[x] ): dev_id = DEVICE_TYPES_INT[x]
	978
	979	if ( dev_id == 0xFFFFFFFF ):
	980	print '[genarch error] in Irq.cbin()'
	981	print ' undefined device type %s' % self.dev.ptype
	982	sys.exit(1)
	983
	984	byte_stream = bytearray()
	985	byte_stream += mapping.int2bytes( 4, dev_id )
	986	byte_stream += mapping.int2bytes( 1, self.channel )
	987	byte_stream += mapping.int2bytes( 1, self.is_rx )
	988	byte_stream += mapping.int2bytes( 1, self.port )
	989	byte_stream += mapping.int2bytes( 1, 0 )
	990
	991	if ( verbose ):
	992	print 'dev_id = %d' % dev_id
	993	print 'channel = %d' % self.channel
	994	print 'is_rx = %d' % self.is_rx
	995	print 'port = %s' % self.port
	996
	997	return byte_stream
	998
	999	# Local Variables:
	1000	# tab-width: 4;
	1001	# c-basic-offset: 4;
	1002	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	1003	# indent-tabs-mode: nil;
	1004	# End:
	1005	#
	1006	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	1007

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source: trunk/tools/arch_info/arch_classes.py @ 690

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