Changeset 117 for trunk/hal/x86_64/core/hal_apic.c

Timestamp:

Jul 3, 2017, 11:21:16 AM (7 years ago)

Author:

max@…

Message:

Calibrate the LAPIC timer with the PIT, with one interrupt per
second for now (will be revisited).

File:

• trunk/hal/x86_64/core/hal_apic.c (modified) (3 diffs)

trunk/hal/x86_64/core/hal_apic.c

@@ -54 +54 @@
 /* -------------------------------------------------------------------------- */
 
+uint64_t pit_ticks_base __in_kdata = 0;
+
+#define PIT_FREQUENCY   1193182
+#define HZ              100 /* 1/HZ = 10ms */
+
+#define PIT_TIMER0      0x40
+
+#define PIT_CMD         0x43
+#       define CMD_BINARY       0x00 /* Use Binary counter values */
+#       define CMD_BCD          0x01 /* Use Binary Coded Decimal counter values */
+#       define CMD_MODE0        0x00 /* Interrupt on Terminal Count */
+#       define CMD_MODE1        0x02 /* Hardware Retriggerable One-Shot */
+#       define CMD_MODE2        0x04 /* Rate Generator */
+#       define CMD_MODE3        0x06 /* Square Wave */
+#       define CMD_MODE4        0x08 /* Software Trigerred Strobe */
+#       define CMD_MODE5        0x0a /* Hardware Trigerred Strobe */
+#       define CMD_LATCH        0x00 /* latch counter for reading */
+#       define CMD_LSB          0x10 /* LSB, 8 bits */
+#       define CMD_MSB          0x20 /* MSB, 8 bits */
+#       define CMD_16BIT        0x30 /* LSB and MSB, 16 bits */
+#       define CMD_COUNTER0     0x00
+#       define CMD_COUNTER1     0x40
+#       define CMD_COUNTER2     0x80
+#       define CMD_READBACK     0xc0
+
+void hal_pit_init()
+{
+        /* Initialize PIT clock 0 to the maximum counter value, 65535. */
+        out8(PIT_CMD, CMD_COUNTER0|CMD_MODE2|CMD_16BIT);
+        out8(PIT_TIMER0, 0xFF);
+        out8(PIT_TIMER0, 0xFF);
+}
+
+uint64_t
+hal_pit_timer_read()
+{
+        static uint16_t last;
+
+        uint8_t lo, hi;
+        uint16_t ctr;
+        uint64_t ticks;
+
+        /* Read the current timer counter. */
+        out8(PIT_CMD, CMD_COUNTER0|CMD_LATCH);
+        lo = in8(PIT_TIMER0);
+        hi = in8(PIT_TIMER0);
+        ctr = (hi << 8) | lo;
+
+        /* If the counter has wrapped, assume we're into the next tick. */
+        if (ctr > last)
+                pit_ticks_base += 0xFFFF;
+        last = ctr;
+
+        ticks = pit_ticks_base + (0xFFFF - ctr);
+
+        return ticks;
+}
+
+/* -------------------------------------------------------------------------- */
+
 paddr_t ioapic_pa __in_kdata = 0;
 vaddr_t ioapic_va __in_kdata = 0;
@@ -132 +192 @@
 {
         return hal_lapic_read(LAPIC_ID) >> LAPIC_ID_SHIFT;
+}
+
+/*
+ * Use the PIT, which has a standard clock frequency, to determine the CPU's
+ * exact bus frequency.
+ */
+static void hal_lapic_calibrate()
+{
+        uint64_t pittick, lapictick0, lapictick1;
+        uint32_t lapicticks, lapicstart;
+
+        /* Initialize the LAPIC timer to the maximum value */
+        hal_lapic_write(LAPIC_ICR_TIMER, 0xFFFFFFFF); 
+
+        pittick = hal_pit_timer_read() + 1;
+        while (hal_pit_timer_read() < pittick) {
+                /* Wait until start of a PIT tick */
+        }
+
+        /* Read base count from LAPIC */
+        lapictick0 = hal_lapic_read(LAPIC_CCR_TIMER);
+
+        while (hal_pit_timer_read() < pittick + (PIT_FREQUENCY + HZ/2) / HZ) {
+                /* Wait 1/HZ sec = 10ms */
+        }
+
+        /* Read final count from LAPIC */
+        lapictick1 = hal_lapic_read(LAPIC_CCR_TIMER);
+
+        /* Total number of LAPIC ticks per 1/HZ tick */
+        lapicticks = (lapictick1 - lapictick0);
+
+        /* Finally, calibrate the timer, an interrupt each 1s. */
+        lapicstart = - (lapicticks * 100);
+        hal_lapic_write(LAPIC_ICR_TIMER, lapicstart);
 }
 
@@ -171 +266 @@
         hal_lapic_write(LAPIC_LVT_TMR, LAPIC_TMR_TM|LAPIC_TMR_M);
         hal_lapic_write(LAPIC_DCR_TIMER, LAPIC_DCRT_DIV1);
-        hal_lapic_write(LAPIC_ICR_TIMER, 1000000000); // XXX calibrate
+        hal_lapic_calibrate();
         hal_lapic_write(LAPIC_LVT_TMR, LAPIC_TMR_TM|LAPIC_TIMER_VECTOR);
 }