- Timestamp:
- Jul 4, 2017, 12:05:39 PM (7 years ago)
- Location:
- trunk/hal/x86_64
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/x86_64/core/hal_apic.c
r137 r138 280 280 hal_lapic_write(LAPIC_TPR, 0); 281 281 hal_lapic_write(LAPIC_EOI, 0); 282 hal_lapic_write(LAPIC_SVR, LAPIC_SVR_ENABLE| LAPIC_SPURIOUS_VECTOR);282 hal_lapic_write(LAPIC_SVR, LAPIC_SVR_ENABLE|VECTOR_APIC_SPURIOU); 283 283 284 284 /* Explicitly disable (mask) each vector */ -
trunk/hal/x86_64/core/hal_apic.h
r137 r138 30 30 /* 31 31 ******************************************************************************* 32 * IOAPIC32 * Fake APIC status, used by XCU (soft) 33 33 ******************************************************************************* 34 34 */ 35 36 37 35 #define APIC_FAKE_STATUS_HWI 0x1000 36 #define APIC_FAKE_STATUS_WTI 0x2000 37 #define APIC_FAKE_STATUS_PTI 0x4000 38 38 39 39 /* … … 42 42 ******************************************************************************* 43 43 */ 44 45 #define LAPIC_SPURIOUS_VECTOR LAPICVEC_MIN46 #define LAPIC_TIMER_VECTOR (LAPICVEC_MIN + 1)47 #define IOAPIC_KEYBOARD_VECTOR (LAPICVEC_MIN + 2)48 44 49 45 #define LAPIC_ID 0x020 /* ID. RW */ -
trunk/hal/x86_64/core/hal_init.c
r137 r138 95 95 dev->channels = 1; 96 96 97 #if NOTYET 97 98 /* 98 99 * Give 20% of the pins to HWI, 80% to WTI. … … 100 101 dev->param0 = (ioapic_pins * 20) / 100; /* hwi_nr */ 101 102 dev->param1 = ioapic_pins - dev->param0; /* wti_nr */ 103 #else 104 dev->param0 = 1; /* hwi_nr */ 105 dev->param1 = 1; /* wti_nr */ 106 #endif 102 107 103 108 /* … … 421 426 } 422 427 423 /* LAPICinterrupts */424 for (i = LAPICVEC_MIN; i < LAPICVEC_MAX; i++) {425 idt_set_seg(&idt[i], (void *)x86_intrs[i - LAPICVEC_MIN], 0,428 /* Dynamically configured interrupts */ 429 for (i = DYNVEC_MIN; i < DYNVEC_MAX; i++) { 430 idt_set_seg(&idt[i], (void *)x86_intrs[i - DYNVEC_MIN], 0, 426 431 SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); 427 432 } -
trunk/hal/x86_64/core/hal_kentry.S
r89 r138 156 156 iretq 157 157 158 /* 159 * The XCU interrupt entries. 160 */ 161 162 #define XCU_WTI_ENTRY(n) \ 163 ASM_ENTRY(x86_xcu_wti_ ## n) \ 164 pushq $0 ; \ 165 pushq $T_ASTFLT ; \ 166 INTR_SAVE_REGS ; \ 167 ; \ 168 movq $(APIC_FAKE_STATUS_WTI|n),CPUVAR(APIC_FAKE_STATUS); \ 169 call hal_do_interrupt; \ 170 ; \ 171 INTR_RESTORE_REGS ; \ 172 addq $16,%rsp ; \ 173 iretq 174 175 #define XCU_HWI_ENTRY(n) \ 176 ASM_ENTRY(x86_xcu_hwi_ ## n) \ 177 pushq $0 ; \ 178 pushq $T_ASTFLT ; \ 179 INTR_SAVE_REGS ; \ 180 ; \ 181 movq $(APIC_FAKE_STATUS_HWI|n),CPUVAR(APIC_FAKE_STATUS); \ 182 call hal_do_interrupt; \ 183 ; \ 184 INTR_RESTORE_REGS ; \ 185 addq $16,%rsp ; \ 186 iretq 187 188 #define XCU_PTI_ENTRY(n) \ 189 ASM_ENTRY(x86_xcu_pti_ ## n) \ 190 pushq $0 ; \ 191 pushq $T_ASTFLT ; \ 192 INTR_SAVE_REGS ; \ 193 ; \ 194 movq $(APIC_FAKE_STATUS_PTI|n),CPUVAR(APIC_FAKE_STATUS); \ 195 call hal_do_interrupt; \ 196 ; \ 197 INTR_RESTORE_REGS ; \ 198 addq $16,%rsp ; \ 199 iretq 200 201 XCU_WTI_ENTRY(0) 202 XCU_HWI_ENTRY(0) 203 XCU_PTI_ENTRY(0) 204 158 205 /* 159 206 * Arguments pushed on the stack: … … 198 245 x86_intrs: 199 246 .quad x86_lapic_spurious 247 .quad x86_xcu_wti_0 248 .quad x86_xcu_hwi_0 249 .quad x86_xcu_pti_0 250 200 251 .quad x86_lapic_timer 201 252 .quad x86_ioapic_keyboard -
trunk/hal/x86_64/core/hal_kentry.h
r109 r138 44 44 /* Trap's coming from user mode */ 45 45 #define T_USER 0x100 46 47 #define CPU_INFO_APIC_FAKE_STATUS 8 48 #define CPUVAR(off) %gs:CPU_INFO_ ## off 46 49 47 50 #define TF_REGSIZE (19 * 8) -
trunk/hal/x86_64/core/hal_segmentation.h
r89 r138 193 193 #define CPUVEC_MIN 0 194 194 #define CPUVEC_MAX 32 /* reserved entries for CPU exceptions */ 195 #define LAPICVEC_MIN CPUVEC_MAX 196 #define LAPICVEC_MAX (LAPICVEC_MIN + 3) 195 196 #define DYNVEC_MIN CPUVEC_MAX 197 #define DYNVEC_MAX (DYNVEC_MIN + 6) 198 199 #define VECTOR_APIC_SPURIOU (DYNVEC_MIN + 0) 200 #define VECTOR_APIC_XCU_WTI (DYNVEC_MIN + 1) 201 #define VECTOR_APIC_XCU_HWI (DYNVEC_MIN + 2) 202 #define VECTOR_APIC_XCU_PTI (DYNVEC_MIN + 3) 203 204 /* debug only, will be removed soon */ 205 #define LAPIC_TIMER_VECTOR (DYNVEC_MIN + 4) 206 #define IOAPIC_KEYBOARD_VECTOR (DYNVEC_MIN + 5) 197 207 198 208 #define NIDT 256 /* total number of IDT entries */ -
trunk/hal/x86_64/core/hal_special.c
r125 r138 31 31 struct thread_s; 32 32 33 typedefstruct cpu_info {33 struct cpu_info { 34 34 void *ci_self; 35 uint64_t apic_fake_status; 35 36 uint32_t ci_gid; 36 37 uint32_t ci_lid; 37 38 struct thread_s *ci_thr; 38 } cpu_info_t; 39 } __packed; 40 typedef struct cpu_info cpu_info_t; 39 41 40 42 cpu_info_t cpu0 __in_kdata; … … 104 106 { 105 107 curcpu()->ci_thr = thread; 108 } 109 110 uint8_t hal_get_apic_fake_status() 111 { 112 return curcpu()->apic_fake_status; 106 113 } 107 114 -
trunk/hal/x86_64/drivers/soclib_xcu.c
r137 r138 1 1 /* 2 * soclib_xcu.c - soclibXCU driver API implementation.2 * soclib_xcu.c - x86 XCU driver API implementation. 3 3 * 4 * Authors Alain Greiner (2016) 5 * 6 * Copyright (c) UPMC Sorbonne Universites 4 * Copyright (c) 2017 Maxime Villard 7 5 * 8 6 * This file is part of ALMOS-MKH. 9 7 * 10 * ALMOS-MKH .is free software; you can redistribute it and/or modify it8 * ALMOS-MKH is free software; you can redistribute it and/or modify it 11 9 * under the terms of the GNU General Public License as published by 12 10 * the Free Software Foundation; version 2.0 of the License. 13 11 * 14 * ALMOS-MKH .is distributed in the hope that it will be useful, but12 * ALMOS-MKH is distributed in the hope that it will be useful, but 15 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU … … 18 16 * 19 17 * You should have received a copy of the GNU General Public License 20 * along with ALMOS- kernel; if not, write to the Free Software Foundation,18 * along with ALMOS-MKH.; if not, write to the Free Software Foundation, 21 19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 22 20 */ … … 28 26 29 27 #include <hal_apic.h> 28 #include <hal_segmentation.h> 30 29 #include <hal_internal.h> 31 30 32 31 extern size_t ioapic_pins; 33 34 uint64_t apic_fake_status __in_kdata = 0;35 32 36 33 /* … … 40 37 uint32_t wti_baseidx __in_kdata = 0; 41 38 uint32_t pti_baseidx __in_kdata = 0; 39 40 static uint32_t get_pin(uint32_t idx, uint32_t type) 41 { 42 switch (type) { 43 case HWI_TYPE: 44 return hwi_baseidx + idx; 45 case WTI_TYPE: 46 return wti_baseidx + idx; 47 case PTI_TYPE: 48 return pti_baseidx + idx; 49 default: 50 x86_panic("get_pin: wrong type"); 51 return 0; 52 } 53 } 42 54 43 55 void soclib_xcu_init(chdev_t *icu, lid_t lid) … … 56 68 lid_t lid) 57 69 { 70 uint8_t dest = (uint8_t)lid; /* XXX */ 58 71 uint32_t pin; 72 uint8_t vec; 73 74 pin = get_pin(idx, type); 59 75 60 76 switch (type) { 61 77 case HWI_TYPE: 62 pin = hwi_baseidx + idx;78 vec = VECTOR_APIC_XCU_HWI; 63 79 case WTI_TYPE: 64 pin = wti_baseidx + idx;80 vec = VECTOR_APIC_XCU_WTI; 65 81 case PTI_TYPE: 66 pin = pti_baseidx + idx;82 vec = VECTOR_APIC_XCU_PTI; 67 83 default: 68 84 x86_panic("enabling wrong irq"); 69 85 } 86 87 hal_ioapic_set_entry(pin, vec, dest); 70 88 71 89 x86_panic((char *)__func__); … … 75 93 lid_t lid) 76 94 { 95 uint32_t pin = get_pin(idx, type); 96 97 hal_ioapic_disable_entry(pin); 98 77 99 x86_panic((char *)__func__); 78 100 } 79 101 80 void soclib_xcu_get_masks( chdev_t * icu, 81 lid_t lid, 82 uint32_t * hwi_mask, 83 uint32_t * wti_mask, 84 uint32_t * pti_mask ) 102 void soclib_xcu_get_masks(chdev_t *icu, lid_t lid, uint32_t *hwi_mask, 103 uint32_t *wti_mask, uint32_t *pti_mask) 85 104 { 86 105 x86_panic((char *)__func__); … … 101 120 } 102 121 103 104 105 106 107 122 void soclib_xcu_get_status(chdev_t *icu, lid_t lid, uint32_t *hwi_status, 108 123 uint32_t *wti_status, uint32_t *pti_status) … … 114 129 x86_panic((char *)__func__); 115 130 } 116 117 118 119 120 121 131 122 132 void soclib_xcu_send_ipi( xptr_t icu_xp,
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