Changeset 236 for trunk/hal/x86_64/core

Timestamp:

Jul 19, 2017, 2:30:15 PM (7 years ago)

Author:

max@…

Message:

Launch the secondary CPUs. For now, they all say hello and enter
an infinite loop.

Location:

trunk/hal/x86_64/core

Files:

• hal_apic.c (modified) (1 diff)
• hal_apic.h (modified) (1 diff)
• hal_boot.h (modified) (2 diffs)
• hal_cpu.S (modified) (1 diff)
• hal_init.c (modified) (4 diffs)
• hal_internal.h (modified) (1 diff)
• hal_smpboot.S (added)

trunk/hal/x86_64/core/hal_apic.c

@@ -491 +491 @@
 
 int
-start_secondary_cpu(uint32_t gid, paddr_t pa)
+boot_cpuN(uint32_t gid, paddr_t pa)
 {
         /*

trunk/hal/x86_64/core/hal_apic.h

@@ -34 +34 @@
 uint32_t hal_lapic_gid();
 void hal_apic_init();
+
+int boot_cpuN(uint32_t gid, paddr_t pa);
+
 #endif
 

trunk/hal/x86_64/core/hal_boot.h

@@ -37 +37 @@
 #define ASM_ENTRY(x) \
         .text; ASM_ALIGN_TEXT; .globl x; .type x,@function; x:
+
+#define LABEL(x) \
+        .globl x; .type x,@function; x:
 
 /* -------------------------------------------------------------------------- */
@@ -131 +134 @@
 /* -------------------------------------------------------------------------- */
 
+#define SMP_TRAMPOLINE_PA       (2 * PAGE_SIZE)
+
+/* -------------------------------------------------------------------------- */
+
 #define KERNEL_VA_SIZE          (NKL2_KIMG_ENTRIES * NBPD_L2)
 #define CLUSTERS_BASE_VA        HAL_VA_BASE

trunk/hal/x86_64/core/hal_cpu.S

@@ -108 +108 @@
         ret
 
+ASM_ENTRY(rcr0)
+        movq    %cr0,%rax
+        ret
+
 ASM_ENTRY(rcr2)
         movq    %cr2,%rax
+        ret
+
+ASM_ENTRY(rcr3)
+        movq    %cr3,%rax
         ret
 

trunk/hal/x86_64/core/hal_init.c

@@ -58 +58 @@
 uint8_t mb_mmap[PAGE_SIZE] __in_kdata;
 
+/* x86-specific per-cluster structures */
+uint8_t gdtstore[PAGE_SIZE] __in_kdata;
+uint8_t idtstore[PAGE_SIZE] __in_kdata;
+
+/* x86-specific per-cpu structures */
+typedef struct {
+        bool_t valid;
+        struct tss tss;
+        struct tls tls;
+        uint8_t boot_stack[STKSIZE];
+        uint8_t intr_stack[STKSIZE];
+        uint8_t dbfl_stack[STKSIZE];
+        uint8_t nmfl_stack[STKSIZE];
+} percpu_archdata_t;
+percpu_archdata_t cpudata[CONFIG_MAX_LOCAL_CORES] __in_kdata;
+
 /* -------------------------------------------------------------------------- */
 
@@ -245 +261 @@
 /* -------------------------------------------------------------------------- */
 
+static uint32_t cpuN_booted __in_kdata;
+
+void start_secondary_cpus()
+{
+        pt_entry_t flags = PG_V | PG_KW;
+        extern vaddr_t cpuN_boot_trampoline;
+        extern vaddr_t cpuN_boot_trampoline_end;
+        extern paddr_t smp_L4pa;
+        extern vaddr_t smp_stkva;
+        extern paddr_t L4paddr;
+        size_t i, sz;
+
+        smp_L4pa = L4paddr;
+
+        /* map the SMP trampoline (identity) */
+        vaddr_t trampva = (vaddr_t)SMP_TRAMPOLINE_PA;
+        hal_gpt_maptree_area(trampva, trampva + PAGE_SIZE);
+        hal_gpt_enter(trampva, SMP_TRAMPOLINE_PA, flags);
+
+        /* copy it */
+        sz = (size_t)&cpuN_boot_trampoline_end - (size_t)&cpuN_boot_trampoline;
+        memcpy((void *)trampva, (void *)&cpuN_boot_trampoline, sz);
+
+        for (i = 0; i < CONFIG_MAX_LOCAL_CORES; i++) {
+                if (i == 0 || !cpudata[i].valid) {
+                        continue;
+                }
+
+                smp_stkva = (vaddr_t)cpudata[i].boot_stack + STKSIZE;
+
+                cpuN_booted = 0;
+                boot_cpuN(i, SMP_TRAMPOLINE_PA);
+                while (!hal_atomic_cas(&cpuN_booted, 1, 0)) {
+                        /* wait */
+                }
+        }
+
+        // XXX: unmap the trampoline
+}
+
+void init_x86_64_cpuN()
+{
+        cpuN_booted = 1;
+        x86_printf("-> cpu%z is alive!\n", hal_lapic_gid());
+        while (1);
+}
+
+/* -------------------------------------------------------------------------- */
+
 static void apic_map()
 {
@@ -310 +375 @@
         init_bootinfo(&btinfo);
 
+        start_secondary_cpus();
+
         reg_t dummy;
         hal_enable_irq(&dummy);
@@ -342 +409 @@
 
 /* -------------------------------------------------------------------------- */
-
-/* x86-specific per-cluster structures */
-uint8_t gdtstore[PAGE_SIZE] __in_kdata;
-uint8_t idtstore[PAGE_SIZE] __in_kdata;
-
-/* x86-specific per-cpu structures */
-typedef struct {
-        bool_t valid;
-        struct tss tss;
-        struct tls tls;
-        uint8_t intr_stack[STKSIZE];
-        uint8_t dbfl_stack[STKSIZE];
-        uint8_t nmfl_stack[STKSIZE];
-} percpu_archdata_t;
-percpu_archdata_t cpudata[CONFIG_MAX_LOCAL_CORES] __in_kdata;
 
 void cpu_activate(uint32_t gid)

trunk/hal/x86_64/core/hal_internal.h

@@ -48 +48 @@
 void wrmsr(uint32_t, uint64_t);
 void mfence();
-vaddr_t rcr2(void);
+uint64_t rcr0(void);
+vaddr_t rcr2(void);
+uint64_t rcr3(void);
 uint64_t rcr4(void);
 void lcr4(uint64_t);