Ignore:
Timestamp:
Jul 20, 2017, 10:29:35 AM (7 years ago)
Author:
max@…
Message:

Mmh, some CPUs can boot with the cache disabled, so explicitly
enable it.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/hal/x86_64/core/hal_smpboot.S

    r236 r243  
    151151        movl    %cr0,%eax
    152152        orl     $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax
     153        andl    $~(CR0_CD|CR0_NW),%eax
    153154        movl    %eax,%cr0
    154155
Note: See TracChangeset for help on using the changeset viewer.