Changeset 296 for trunk/hal/tsar_mips32/core/hal_ppm.c
- Timestamp:
- Jul 31, 2017, 1:59:52 PM (8 years ago)
- File:
-
- 1 edited
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trunk/hal/tsar_mips32/core/hal_ppm.c
r279 r296 35 35 36 36 ////////////////////////////////////////////////////////////////////////////////////////// 37 // This file contains the TSAR specific code for cores registers, 38 // and for physical memory allocators initialisation in a given cluster. 39 37 40 // For The TSAR architecture, the kernel pointers are identity mapped: 38 41 // - the 32 bits PTR value is identical to the 32 bits LPA value, 39 42 // - the 64 bits XPTR value is identical to the 64 bits PADDR value. 40 // The pages_tbl[] is mapped in first free page after kernel code. 43 // This hal_ppm_init() function initializes the pages_tbl[] array used by the generic 44 // kmem memory allocator in the local cluster. This array starts in first free page 45 // after kernel code, as defined by the 'offset' field in boot_info. 46 // 47 // For the TSAR architecture the MIP32 EBASE register defining the kernel entry point 48 // fot Interrupts, Exceptions and Syscalls, has to be redefined. 41 49 ////////////////////////////////////////////////////////////////////////////////////////// 42 50 … … 49 57 uint32_t pages_nr = info->pages_nr; 50 58 uint32_t pages_tbl_offset = info->pages_offset; 51 uint32_t rsvd_nr = info->rsvd_nr;52 59 53 60 // get pointer on local Physical Page Manager … … 113 120 // check consistency 114 121 return ppm_assert_order( ppm ); 115 }116 122 123 } // end hal_ppm_init() 124 125 //////////////////////////////////////// 126 void hal_core_init( boot_info_t * info ) 127 { 128 // get relevant info from boot_info structure 129 reg_t kentry_base = info->kentry_base; 130 131 // set CP0_EBASE register 132 hal_set_ebase( kentry_base ); 133 134 } // end hal_core_init()
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