Changeset 339

Timestamp:

Aug 7, 2017, 3:11:45 PM (7 years ago)

Author:

max@…

Message:

Add support for context switch - not tested yet, due to some other bugs in
the mapper. This cswitch is similar to that of TSAR.

Location:

trunk/hal/x86_64/core

Files:

• hal_context.c (modified) (4 diffs)
• hal_cpu.S (modified) (2 diffs)
• hal_init.c (modified) (1 diff)
• hal_internal.h (modified) (1 diff)
• hal_kentry.h (modified) (4 diffs)
• hal_segmentation.h (modified) (2 diffs)

trunk/hal/x86_64/core/hal_context.c

@@ -39 +39 @@
         hal_trapframe_t *tf;
         hal_cpu_context_t *ctx;
+        uint64_t kstacktop;
         kmem_req_t req;
+
+        kstacktop = (uint64_t)thread->k_stack_base + thread->k_stack_size;
 
         /* allocate memory for cpu_context */
@@ -56 +59 @@
          * Build the context
          */
-        ctx->ctx_rsp0 = ((uint64_t)thread->k_stack_base) + thread->k_stack_size;
-        ctx->ctx_rsp0 &= ~0xF;
-        /* XXX: ctx_rsp */
+        ctx->ctx_rsp0 = kstacktop & ~0xF;
+        ctx->ctx_tf = (uint64_t)&ctx->ctx_hidden_tf;
 
         /*
          * Build the trap frame
          */
-        tf = (void *)(((uint64_t)thread->k_stack_base +
-            thread->k_stack_size) & ~0xF);
+        tf = &ctx->ctx_hidden_tf;
         tf->tf_gs = GDT_FIXED_SEL(GDT_UDATA_SEL, SEL_UPL);
         tf->tf_fs = GDT_FIXED_SEL(GDT_UDATA_SEL, SEL_UPL);
@@ -78 +79 @@
         } else {
                 tf->tf_cs = GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL);
-                tf->tf_rsp = ((uint64_t)thread->k_stack_base) +
-                    thread->k_stack_size;
+                tf->tf_rsp = kstacktop;
         }
 
@@ -99 +99 @@
 {
         x86_panic((char *)__func__);
+
+        /* Switch the VM space */
+        // TODO
+
+        /* Switch the CPU context */
+        cpu_context_switch(old->cpu_context, new->cpu_context);
 }
 

trunk/hal/x86_64/core/hal_cpu.S

@@ -24 +24 @@
 #include <hal_segmentation.h>
 #include <hal_register.h>
+#include <hal_kentry.h>
 
 ASM_ENTRY(lgdt)
@@ -181 +182 @@
 /* -------------------------------------------------------------------------- */
 
+ASM_ENTRY(cpu_context_switch)
+        pushq   %r12
+        pushq   %r13
+
+        movq    %rdi,%r13       /* oldctx */
+        movq    %rsi,%r12       /* newctx */
+
+        /*
+         * Save the current stack in %rdx, and switch to the trap frame of
+         * the old thread.
+         */
+        movq    %rsp,%rdx
+        movq    CTX_TF(%r13),%rsp
+        addq    $TF_SIZE,%rsp   /* end of the structure */
+
+        /* Build the trap frame */
+        movl    %ss,%eax
+        pushq   %rax            /* tf_ss */
+        pushq   %rdx            /* tf_rsp */
+        pushfq                  /* tf_rflags */
+        movl    %cs,%eax
+        pushq   %rax            /* tf_cs */
+        movabsq $thr_resume,%rax
+        pushq   %rax            /* tf_rip */
+        pushq   $0              /* tf_err */
+        pushq   $T_ASTFLT       /* tf_trapno */
+        INTR_SAVE_REGS
+
+        /* Switch rsp0 */
+        movq    CTX_RSP0(%r12),%rax
+        movq    TLSVAR(RSP0),%rdx
+        movq    %rax,(%rdx)
+
+        /* Switch to the new trap frame */
+        movq    CTX_TF(%r12),%rsp
+
+        /*
+         * Restore the context, and jump into the new thread.
+         */
+        INTR_RESTORE_REGS
+        iretq
+
+thr_resume:
+        /*
+         * Only pop %r12 and %r13, and return.
+         */
+        popq    %r13
+        popq    %r12
+
+        ret
+
+/* -------------------------------------------------------------------------- */
+
 ASM_ENTRY(atomic_cas_32)
         movl    %esi,%eax

trunk/hal/x86_64/core/hal_init.c

@@ -654 +654 @@
         cputls->tls_gid = hal_lapic_gid();
         cputls->tls_lid = lid;
+        /* cputls->tls_rsp0 = (uint64_t)&data->tss.tss_rsp0; */
         cputls->tls_intr = INTRS_DISABLED;
 

trunk/hal/x86_64/core/hal_internal.h

@@ -61 +61 @@
 void wbinvd();
 
+void cpu_context_switch(void *oldctx, void *newctx);
+
 uint32_t atomic_cas_32(volatile uint32_t *ptr, uint32_t exp, uint32_t new);
 uint32_t atomic_add_32(volatile uint32_t *ptr, int32_t incr);

trunk/hal/x86_64/core/hal_kentry.h

@@ -45 +45 @@
 #define T_USER  0x100
 
-#define CPUVAR(off)     %gs:CPU_INFO_ ## off
+#define TLSVAR(off)     %gs:TLS_ ## off
 
 /*
@@ -128 +128 @@
 
 /*
- * The x86_64 CPU trap frame.
+ * The x86_64 CPU trap frame. !!WARNING!! The size of this structure must be
+ * exactly TF_SIZE.
  */
 typedef struct hal_trapframe_s {
@@ -168 +169 @@
 typedef struct hal_cpu_context_s {
         uint64_t ctx_rsp0;
-        uint64_t ctx_rsp;
-        uint64_t ctx_rbp;
+        uint64_t ctx_tf;
+        hal_trapframe_t ctx_hidden_tf;
 } hal_cpu_context_t;
 
 #else
 
-/* offsets in the trapframe structure */
+/* Offsets in the trapframe structure */
 #define TF_RAX  0
 #define TF_RBX  8
@@ -195 +196 @@
 #define TF_DS   144
 
+/* Size of the trapframe structure */
+#define TF_SIZE 208
+
+/* Offsets in the context structure */
+#define CTX_RSP0  0
+#define CTX_TF    8
+
 #endif
 

trunk/hal/x86_64/core/hal_segmentation.h

@@ -154 +154 @@
         uint32_t tls_gid;
         uint32_t tls_lid;
+        uint64_t tls_rsp0; /* pointer for fast access */
         void *tls_thr;
         reg_t tls_intr;
-        void *tls_tf;
+        void *tls_tf;     /* debug only */
 } __packed;
 typedef struct tls tls_t;
@@ -169 +170 @@
 
 #endif /* !x86_ASM */
+
+/* TLS offsets */
+#define TLS_SELF        0
+#define TLS_GID         8
+#define TLS_LID         12
+#define TLS_RSP0        16
 
 /* system segments and gate types */