Changeset 432 for trunk/hal/tsar_mips32/core/hal_gpt.c
- Timestamp:
- Feb 14, 2018, 3:39:35 PM (7 years ago)
- File:
-
- 1 edited
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trunk/hal/tsar_mips32/core/hal_gpt.c
r420 r432 132 132 xptr_t page_xp; 133 133 134 gpt_dmsg("\n[DBG] %s : core[%x,%d] enter\n", 135 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid ); 134 #if CONFIG_DEBUG_GPT_ACCESS 135 uint32_t cycle = (uint32_t)hal_get_cycles; 136 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 137 printk("\n[DBG] %s : thread %x enter / cycle %d\n", 138 __FUNCTION__, CURRENT_THREAD, cycle ); 139 #endif 136 140 137 141 // check page size … … 157 161 gpt->ppn = ppm_page2ppn( page_xp ); 158 162 159 gpt_dmsg("\n[DBG] %s : core[%x,%d] exit\n", 160 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid ); 163 #if CONFIG_DEBUG_GPT_ACCESS 164 cycle = (uint32_t)hal_get_cycles; 165 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 166 printk("\n[DBG] %s : thread %x exit / cycle %d\n", 167 __FUNCTION__, CURRENT_THREAD, cycle ); 168 #endif 161 169 162 170 return 0; … … 332 340 uint32_t tsar_attr; // PTE attributes for TSAR MMU 333 341 334 gpt_dmsg("\n[DBG] %s : core[%x,%d] enter for vpn = %x / ppn = %x / gpt_attr = %x\n", 335 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , vpn , ppn , attr ); 336 342 #if CONFIG_DEBUG_GPT_ACCESS 343 uint32_t cycle = (uint32_t)hal_get_cycles; 344 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 345 printk("\n[DBG] %s : thread %x enter / vpn %x / attr %x / ppn %x / cycle %d\n", 346 __FUNCTION__, CURRENT_THREAD, vpn, attr, ppn, cycle ); 347 #endif 348 337 349 // compute indexes in PT1 and PT2 338 350 ix1 = TSAR_MMU_IX1_FROM_VPN( vpn ); … … 342 354 small = attr & GPT_SMALL; 343 355 344 // compute tsar _attrfrom generic attributes356 // compute tsar attributes from generic attributes 345 357 tsar_attr = gpt2tsar( attr ); 346 358 347 gpt_dmsg("\n[DBG] %s : core[%x,%d] / vpn = %x / &pt1 = %x / tsar_attr = %x\n", 348 __FUNCTION__, local_cxy , CURRENT_THREAD->core->lid , vpn , pt1 , tsar_attr ); 359 #if (CONFIG_DEBUG_GPT_ACCESS & 1) 360 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 361 printk("\n[DBG] %s : thread %x / vpn %x / &pt1 %x / tsar_attr %x\n", 362 __FUNCTION__, CURRENT_THREAD, vpn, pt1, tsar_attr ); 363 #endif 349 364 350 365 // get pointer on PT1[ix1] … … 377 392 pte1 = *pte1_ptr; 378 393 379 gpt_dmsg("\n[DBG] %s : core[%x,%d] / vpn = %x / current_pte1 = %x\n", 380 __FUNCTION__, local_cxy , CURRENT_THREAD->core->lid , vpn , pte1 ); 394 #if (CONFIG_DEBUG_GPT_ACCESS & 1) 395 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 396 printk("\n[DBG] %s : thread %x / vpn %x / current_pte1 %x\n", 397 __FUNCTION__, CURRENT_THREAD, vpn, pte1 ); 398 #endif 381 399 382 400 // allocate a PT2 if PT1 entry not valid … … 419 437 pt2 = (uint32_t *)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 420 438 421 gpt_dmsg("\n[DBG] %s : core[%x,%d] / vpn = %x / pte1 = %x / &pt2 = %x\n", 422 __FUNCTION__, local_cxy , CURRENT_THREAD->core->lid , vpn , pte1 , pt2 ); 439 #if (CONFIG_DEBUG_GPT_ACCESS & 1) 440 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 441 printk("\n[DBG] %s : thread %x / vpn %x / pte1 %x / &pt2 %x\n", 442 __FUNCTION__, CURRENT_THREAD, vpn, pte1, pt2 ); 443 #endif 423 444 424 445 } … … 431 452 hal_fence(); 432 453 433 gpt_dmsg("\n[DBG] %s : core[%x,%d] exit / vpn = %x / pte2_attr = %x / pte2_ppn = %x\n", 434 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , vpn , 435 pt2[2 * ix2] , pt2[2 * ix2 + 1] ); 436 454 #if CONFIG_DEBUG_GPT_ACCESS 455 cycle = (uint32_t)hal_get_cycles; 456 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 457 printk("\n[DBG] %s : thread %x exit / vpn %x / pte2_attr %x / pte2_ppn %x / cycle %d\n", 458 __FUNCTION__, CURRENT_THREAD, vpn, pt2[2 * ix2], pt2[2 * ix2 + 1], cycle ); 459 #endif 460 437 461 return 0; 438 462 … … 738 762 ppn_t dst_pt2_ppn; 739 763 740 gpt_dmsg("\n[DBG] %s : core[%x,%d] enter for vpn %x\n", 741 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , vpn ); 764 #if CONFIG_DEBUG_GPT_ACCESS 765 uint32_t cycle = (uint32_t)hal_get_cycles; 766 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 767 printk("\n[DBG] %s : thread %x enter / vpn %x / cycle %d\n", 768 __FUNCTION__, CURRENT_THREAD, vpn, cycle ); 769 #endif 742 770 743 771 // get remote src_gpt cluster and local pointer … … 825 853 *ppn = src_pte2_ppn; 826 854 827 gpt_dmsg("\n[DBG] %s : core[%x,%d] exit for vpn %x / copy done\n", 828 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , vpn ); 855 #if CONFIG_DEBUG_GPT_ACCESS 856 cycle = (uint32_t)hal_get_cycles; 857 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 858 printk("\n[DBG] %s : thread %x exit / copy done for vpn %x / cycle %d\n", 859 __FUNCTION__, CURRENT_THREAD, vpn, cycle ); 860 #endif 829 861 830 862 hal_fence(); … … 837 869 *mapped = false; 838 870 *ppn = 0; 839 840 gpt_dmsg("\n[DBG] %s : core[%x,%d] exit for vpn %x / nothing done\n", 841 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , vpn ); 871 872 #if CONFIG_DEBUG_GPT_ACCESS 873 cycle = (uint32_t)hal_get_cycles; 874 if( CONFIG_DEBUG_GPT_ACCESS < cycle ) 875 printk("\n[DBG] %s : thread %x exit / nothing done for vpn %x / cycle %d\n", 876 __FUNCTION__, CURRENT_THREAD, vpn, cycle ); 877 #endif 842 878 843 879 hal_fence(); … … 918 954 919 955 ///////////////////////////////////////// 920 void hal_gpt_flip_cow( bool_t set_cow, 921 xptr_t gpt_xp, 922 vpn_t vpn_base, 923 vpn_t vpn_size ) 956 void hal_gpt_set_cow( xptr_t gpt_xp, 957 vpn_t vpn_base, 958 vpn_t vpn_size ) 924 959 { 925 960 cxy_t gpt_cxy; … … 936 971 uint32_t * pt2; 937 972 ppn_t pt2_ppn; 938 939 uint32_t old_attr; 940 uint32_t new_attr; 973 uint32_t attr; 941 974 942 975 // get GPT cluster and local pointer … … 967 1000 968 1001 // get current PTE2 attributes 969 old_attr = hal_remote_lw( XPTR( gpt_cxy , &pt2[2*ix2] ) );1002 attr = hal_remote_lw( XPTR( gpt_cxy , &pt2[2*ix2] ) ); 970 1003 971 1004 // only MAPPED PTEs are modified 972 if( old_attr & TSAR_MMU_MAPPED )1005 if( attr & TSAR_MMU_MAPPED ) 973 1006 { 974 if( (set_cow != 0) && (old_attr & TSAR_MMU_WRITABLE) ) 975 { 976 new_attr = (old_attr | TSAR_MMU_COW) & (~TSAR_MMU_WRITABLE); 977 hal_remote_sw( XPTR( gpt_cxy , &pt2[2*ix2] ) , new_attr ); 978 } 979 if( (set_cow == 0) && (old_attr & TSAR_MMU_COW ) ) 980 { 981 new_attr = (old_attr | TSAR_MMU_WRITABLE) & (~TSAR_MMU_COW); 982 hal_remote_sw( XPTR( gpt_cxy , &pt2[2*ix2] ) , new_attr ); 983 } 984 } // end if PTE2 mapped 985 } // end if PTE1 mapped 1007 attr = (attr | TSAR_MMU_COW) & (~TSAR_MMU_WRITABLE); 1008 hal_remote_sw( XPTR( gpt_cxy , &pt2[2*ix2] ) , attr ); 1009 } 1010 } 986 1011 } // end loop on pages 987 1012 988 } // end hal_gpt_ flip_cow()1013 } // end hal_gpt_set_cow() 989 1014 990 1015 //////////////////////////////////////////
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