Changeset 624 for trunk/hal/tsar_mips32/core/hal_special.c

Timestamp:

Mar 12, 2019, 1:37:38 PM (5 years ago)

Author:

alain

Message:

Fix several bugs to use the instruction MMU in kernel mode
in replacement of the instruction address extension register,
and remove the "kentry" segment.

This version is running on the tsar_generic_iob" platform.

One interesting bug: the cp0_ebase defining the kernel entry point
(for interrupts, exceptions and syscalls) must be initialized
early in kernel_init(), because the VFS initialisation done by
kernel_ini() uses RPCs, and RPCs uses Inter-Processor-Interrup.

File:

• trunk/hal/tsar_mips32/core/hal_special.c (modified) (1 diff)

trunk/hal/tsar_mips32/core/hal_special.c

@@ -263 +263 @@
 void hal_core_sleep( void )
 {
-    thread_t * this = CURRENT_THREAD;
-
-    printk("\n*** thread[%x,%x] on core[%x,%d]/n"
-           "  sr = %X / sp = %X / ra = %X\n",
-           this->process->pid, this->trdid, local_cxy, this->core->lid,  
-           hal_get_sr(), hal_get_sp(), hal_get_ra() );
-
-        while( 1 ) asm volatile ("nop");
+        while( 1 ) asm volatile ("wait");
 }