Changeset 654 for trunk/hal/tsar_mips32/core/hal_kentry.S
- Timestamp:
- Nov 14, 2019, 4:03:25 PM (5 years ago)
- File:
-
- 1 edited
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trunk/hal/tsar_mips32/core/hal_kentry.S (modified) (8 diffs)
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trunk/hal/tsar_mips32/core/hal_kentry.S
r625 r654 24 24 */ 25 25 26 #define UZ_MODE 026 #define UZ_MODE_DEXT 0 27 27 #define UZ_AT 1 28 28 #define UZ_V0 2 … … 86 86 87 87 #------------------------------------------------------------------------------------ 88 # Kernel Entry point for Interrupt / Exception / Syscall 89 # The c2_dext CP2 register must have been previously set 90 # to "local_cxy", because the kernel run with data MMU desactivated. 88 # Kernel Entry point for Interrupt / Exception / Syscall 89 # At kernel entry, the relevant CPU, CP0, & CP2 registers are saved 90 # in a "UZONE" implemented in the calling thread kernel stack. 91 # All these registers are restored from the UZONE after the kernel 92 # completes the requested service. 93 # 94 # Implementation note: As this code can be executed when the core is already 95 # in kernel mode (after a syscall, the core must handle interrupts, or 96 # non-fatal MMU exceptions), this code implement a two slots stack of UZONE(s). 91 97 #------------------------------------------------------------------------------------ 92 98 93 99 hal_kentry_enter: 94 100 95 mfc0 $26, $12 # get c0_sr 96 andi $26, $26, 0x10 # test User Mode bit 97 beq $26, $0, kernel_mode # jump if core already in kernel 98 ori $27, $0, 0xB # $27 <= code data MMU OFF 101 #------------------------------------------------------------------------------------ 102 # This code made the following actions: 103 # - save CP2_MMU_MODE & CP2_MMU_DEXT in $26, 104 # - set local_cxy into CP2_MMU_DEXT, 105 # - desactivate DATA MMU in CP2_MMU_MODE, 106 # - test if the core is already in kernel mode. 107 108 mfc2 $26, $1 # $26 <= CP2_MMU_MODE 109 andi $27, $26, 0xB # $27 <= code data MMU OFF 110 mtc2 $27, $1 # set data MMU OFF 111 112 mfc2 $27, $24 # $27 <= CP2_MMU_DEXT 113 sll $27, $27, 4 # $27 <= CP2_MMU_DEXT << 4 114 or $26, $26, $27 # $26 <= CP2_MMU_DEXT | CP2_MMU_MODE 115 116 mfc0 $27, $15, 1 # $27 <= core CP0_EBASE 117 andi $27, $27, 0xFFF # $27 <= gid 118 srl $27, $27, 2 # $27 <= local_cxy 119 mtc2 $27, $24 # CP2_MMU_DEXT <= local_cxy 120 121 mfc0 $27, $12 # $27 <= CP0_SR 122 andi $27, $27, 0x10 # test User Mode bit 123 beq $27, $0, kernel_mode # jump if core already in kernel 124 nop 99 125 100 126 #------------------------------------------------------------------------------------ 101 127 # This code is executed when the core is in user mode, 102 # to handle a syscall, an interrupt, or an user exception. 103 # - save current c2_mode in $26. 104 # - set data MMU OFF. 128 # to handle a syscall, an interrupt, or an exception. 105 129 # - copy user stack pointer in $27 to be saved in uzone. 106 130 # - set kernel stack pointer in $29 (kernel stack empty at firts entry). … … 108 132 user_mode: 109 133 110 mfc2 $26, $1 # $26 <= c2_mode111 mtc2 $27, $1 # set data MMU OFF112 134 move $27, $29 # $27 <= user stack pointer 113 135 mfc0 $29, $4, 2 # get pointer on thread descriptor from c0_th … … 119 141 #------------------------------------------------------------------------------------ 120 142 # This code is executed when the core is already in kernel mode, 121 # after a syscall, to handle an interrupt, or to handle a non-fatal exception. 122 # - save current c2_mode in $26. 123 # - set data MMU OFF. 143 # (after a syscall), to handle an interrupt, or a non-fatal exception. 124 144 # - copy current kernel stack pointer in $27. 125 145 126 146 kernel_mode: 127 147 128 mfc2 $26, $1 # $26 <= c2_mode129 mtc2 $27, $1 # set data MMU OFF130 148 move $27, $29 # $27 <= current kernel stack pointer 149 j unified_mode 150 nop 131 151 132 152 #------------------------------------------------------------------------------------ 133 # This code is executed in both modes (user or kernel): 134 # The assumptions are: 135 # - c2_mode contains the data MMU OFF value. 136 # - $26 contains the previous c2_mode value. 137 # - $27 contains the previous sp value (can be usp or ksp). 138 # - $29 contains the curren kernel stack pointer. 139 # We execute the following actions: 153 # This code is executed in both modes (user or kernel). 154 # It executes the following actions: 140 155 # - decrement $29 to allocate an uzone in kernel stack 141 156 # - save GPR, CP0 and CP2 registers to uzone. 142 157 # - set the SR in kernel mode: IRQ disabled, clear EXL. 158 # The assumptions are: 159 # - c2_mode contains the data MMU OFF value. 160 # - $26 contains the previous c2_mode and c2_dext values. 161 # - $27 contains the previous sp value (can be usp or ksp). 162 # - $29 contains the current kernel stack pointer. 143 163 144 164 unified_mode: 145 165 146 addiu $29, $29, -(UZ_REGS*4) # allocate uzone in kernel stack 147 166 addiu $29, $29, -(UZ_REGS*4) # allocate uzone in kernel stack 167 168 sw $26, (UZ_MODE_DEXT*4)($29) # save previous c2_mode and c2_dext values 148 169 sw $1, (UZ_AT*4)($29) 149 170 sw $2, (UZ_V0*4)($29) … … 173 194 174 195 mflo $1 175 sw $1, (UZ_LO*4)($29) # save lo196 sw $1, (UZ_LO*4)($29) # save lo 176 197 mflo $1 177 sw $1, (UZ_HI*4)($29) # save hi178 179 sw $28, (UZ_GP*4)($29) # save gp180 sw $27, (UZ_SP*4)($29) # save previous sp (can be usp or ksp)181 sw $30, (UZ_S8*4)($29) # save s8182 sw $31, (UZ_RA*4)($29) # save ra198 sw $1, (UZ_HI*4)($29) # save hi 199 200 sw $28, (UZ_GP*4)($29) # save gp 201 sw $27, (UZ_SP*4)($29) # save previous sp (can be usp or ksp) 202 sw $30, (UZ_S8*4)($29) # save s8 203 sw $31, (UZ_RA*4)($29) # save ra 183 204 184 205 mfc0 $1, $14 185 sw $1, (UZ_EPC*4)($29) # save c0_epc206 sw $1, (UZ_EPC*4)($29) # save c0_epc 186 207 mfc0 $1, $12 187 sw $1, (UZ_SR*4)($29) # save c0_sr208 sw $1, (UZ_SR*4)($29) # save c0_sr 188 209 mfc0 $1, $4, 2 189 sw $1, (UZ_TH*4)($29) # save c0_th210 sw $1, (UZ_TH*4)($29) # save c0_th 190 211 mfc0 $1, $13 191 sw $1, (UZ_CR*4)($29) # save c0_cr212 sw $1, (UZ_CR*4)($29) # save c0_cr 192 213 mfc2 $1, $0 193 sw $1, (UZ_PTPR*4)($29) # save c2_ptpr 194 195 sw $26, (UZ_MODE*4)($29) # save previous c2_mode (can be user or kernel) 196 197 mfc0 $3, $12 # $3 <= c0_sr 214 sw $1, (UZ_PTPR*4)($29) # save c2_ptpr 215 216 217 mfc0 $3, $12 # $3 <= c0_sr 198 218 srl $3, $3, 5 199 sll $3, $3, 5 # reset 5 LSB bits200 mtc0 $3, $12 # set new c0_sr219 sll $3, $3, 5 # reset 5 LSB bits 220 mtc0 $3, $12 # set new c0_sr 201 221 202 222 #-------------------- … … 271 291 jal puts 272 292 nop 273 # display saved MODE value293 # display saved MODE & DEXT values 274 294 la $4, msg_mode 275 295 jal puts 276 296 nop 277 lw $4, (UZ_MODE *4)($29)297 lw $4, (UZ_MODE_DEXT*4)($29) 278 298 jal putx 279 299 nop … … 430 450 jal puts 431 451 nop 432 # display saved MODE value452 # display saved MODE_DEXT value 433 453 la $4, msg_mode 434 454 jal puts 435 455 nop 436 lw $4, (UZ_MODE *4)($29)456 lw $4, (UZ_MODE_DEXT*4)($29) 437 457 jal putx 438 458 nop … … 498 518 lw $31, (UZ_RA*4)($27) # restore ra_31 from uzone 499 519 500 lw $26, (UZ_MODE*4)($27) 501 mtc2 $26, $1 # restore c2_mode from uzone 520 lw $26, (UZ_MODE_DEXT*4)($27) 521 srl $27, $26, 4 # $27 <= CP2_DEXT 522 mtc2 $27, $24 # restore c2_dest from uzone 523 andi $27, $26, 0xF # $27 <= CP2_MODE 524 mtc2 $27, $1 # restore c2_mode from uzone 502 525 503 526 # -----------------------------------------------------------------------------------
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