Changeset 679 for trunk/hal/tsar_mips32/core
- Timestamp:
- Nov 20, 2020, 12:30:31 AM (4 years ago)
- Location:
- trunk/hal/tsar_mips32/core
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/tsar_mips32/core/hal_context.c
r654 r679 120 120 error_t hal_cpu_context_alloc( thread_t * thread ) 121 121 { 122 assert( (sizeof(hal_cpu_context_t) <= CONFIG_CPU_CTX_SIZE) , 123 122 123 assert( __FUNCTION__, (sizeof(hal_cpu_context_t) <= CONFIG_CPU_CTX_SIZE), "illegal CPU context size" ); 124 124 125 125 // allocate memory for cpu_context … … 139 139 } // end hal_cpu_context_alloc() 140 140 141 ///////////////////////////////////////////////// 142 // The following context slots are initialised 143 // GPR : a0_04 / sp_29 / ra_31141 ////////////////////////////////////////////////////////////////////////////// 142 // The following context slots are initialised for the MIPS32 architecture 143 // GPR : a0_04 / a1_05 / sp_29 / ra_31 144 144 // CP0 : c0_sr / c0_th / c0_epc 145 145 // CP2 : c2_ptpr / c2_mode 146 ///////////////////////////////////////////////// 147 void hal_cpu_context_init( thread_t * thread ) 146 ////////////////////////////////////////////////////////////////////////////// 147 void hal_cpu_context_init( thread_t * thread, 148 bool_t is_main, 149 uint32_t argc, 150 intptr_t argv ) 148 151 { 149 152 hal_cpu_context_t * context = (hal_cpu_context_t *)thread->cpu_context; 150 153 151 assert((context != NULL ), "CPU context not allocated" );154 assert( __FUNCTION__, (context != NULL ), "CPU context not allocated" ); 152 155 153 156 // compute the PPN for the GPT PT1 … … 155 158 156 159 // initialisation depends on thread type 157 if( thread->type == THREAD_USER ) 160 if( (thread->type == THREAD_USER) && (is_main != 0) ) 161 { 162 context->a0_04 = (uint32_t)argc; 163 context->a1_05 = (uint32_t)argv; 164 context->sp_29 = (uint32_t)thread->user_stack_vseg->max - 8; 165 context->ra_31 = (uint32_t)&hal_kentry_eret; 166 context->c0_epc = (uint32_t)thread->entry_func; 167 context->c0_sr = SR_USR_MODE; 168 context->c0_th = (uint32_t)thread; 169 context->c2_ptpr = (uint32_t)(gpt_pt1_ppn >> 1); 170 context->c2_mode = 0xF; 171 } 172 else if( (thread->type == THREAD_USER) && (is_main == 0) ) 158 173 { 159 174 context->a0_04 = (uint32_t)thread->entry_args; … … 353 368 } // end hal_cpu_context_fork() 354 369 355 //////////////////////////////////////////////356 void hal_cpu_context_exec( thread_t * thread )357 {358 // re_initialize CPU context359 hal_cpu_context_init( thread );360 361 // restore CPU registers ... and jump to user code362 hal_do_cpu_restore( (hal_cpu_context_t *)thread->cpu_context );363 364 } // end hal_cpu_context_exec()365 366 370 ///////////////////////////////////////////////// 367 371 void hal_cpu_context_display( xptr_t thread_xp ) … … 379 383 uint32_t sp_29 = hal_remote_l32( XPTR( cxy , &ctx->sp_29 ) ); 380 384 uint32_t ra_31 = hal_remote_l32( XPTR( cxy , &ctx->ra_31 ) ); 385 uint32_t a0_04 = hal_remote_l32( XPTR( cxy , &ctx->a0_04 ) ); 386 uint32_t a1_05 = hal_remote_l32( XPTR( cxy , &ctx->a1_05 ) ); 381 387 uint32_t c0_sr = hal_remote_l32( XPTR( cxy , &ctx->c0_sr ) ); 382 388 uint32_t c0_epc = hal_remote_l32( XPTR( cxy , &ctx->c0_epc ) ); … … 386 392 387 393 printk("\n***** CPU context for thread %x in process %x / cycle %d\n" 388 " sp_29 = %X ra_31= %X\n"389 " c0_sr = %X c0_epc = %Xc0_th = %X\n"390 " c2_ptpr = %X 394 " sp_29 = %X ra_31 = %X a0_04 = %X a1_05 = %X\n" 395 " c0_sr = %X c0_epc = %X c0_th = %X\n" 396 " c2_ptpr = %X c2_mode = %X\n", 391 397 ptr, ptr->process->pid, (uint32_t)hal_get_cycles(), 392 sp_29 , ra_31 ,398 sp_29 , ra_31 , a0_04 , a1_05, 393 399 c0_sr , c0_epc , c0_th, 394 400 c2_ptpr , c2_mode ); … … 417 423 418 424 425 426 427 428 419 429 ////////////////////////////////////////////////// 420 430 error_t hal_fpu_context_alloc( thread_t * thread ) 421 431 { 422 assert( (sizeof(hal_fpu_context_t) <= CONFIG_FPU_CTX_SIZE) ,432 assert( __FUNCTION__, (sizeof(hal_fpu_context_t) <= CONFIG_FPU_CTX_SIZE) , 423 433 "illegal CPU context size" ); 424 434 … … 444 454 hal_fpu_context_t * context = thread->fpu_context; 445 455 446 assert( (context != NULL) , "fpu context not allocated" );456 assert( __FUNCTION__, (context != NULL) , "fpu context not allocated" ); 447 457 448 458 memset( context , 0 , sizeof(hal_fpu_context_t) ); … … 453 463 thread_t * src ) 454 464 { 455 assert( (src != NULL) , "src thread pointer is NULL\n");456 assert( (dst != NULL) , "dst thread pointer is NULL\n");465 assert( __FUNCTION__, (src != NULL) , "src thread pointer is NULL\n"); 466 assert( __FUNCTION__, (dst != NULL) , "dst thread pointer is NULL\n"); 457 467 458 468 // get fpu context pointers -
trunk/hal/tsar_mips32/core/hal_drivers.c
r647 r679 62 62 else 63 63 { 64 assert( false, "undefined implementation" );64 assert( __FUNCTION__, false, "undefined implementation" ); 65 65 } 66 66 } … … 75 75 uint32_t impl = pic->impl; 76 76 77 assert( (impl == IMPL_PIC_SCL), "undefined implementation" );77 assert( __FUNCTION__, (impl == IMPL_PIC_SCL), "undefined implementation" ); 78 78 79 79 soclib_pic_init( pic ); … … 99 99 uint32_t impl = iob->impl; 100 100 101 assert( (impl == IMPL_IOB_TSR), "undefined implementation" );101 assert( __FUNCTION__, (impl == IMPL_IOB_TSR), "undefined implementation" ); 102 102 103 103 soclib_iob_init( iob ); … … 135 135 else 136 136 { 137 assert( false , "undefined IOC device implementation" );137 assert( __FUNCTION__, false , "undefined IOC device implementation" ); 138 138 } 139 139 } … … 148 148 uint32_t impl = mmc->impl; 149 149 150 assert( (impl == IMPL_MMC_TSR), "undefined implementation" );150 assert( __FUNCTION__, (impl == IMPL_MMC_TSR), "undefined implementation" ); 151 151 152 152 soclib_mmc_init( mmc ); … … 162 162 uint32_t impl = nic->impl; 163 163 164 assert( (impl == IMPL_NIC_CBF), "undefined implementation" );164 assert( __FUNCTION__, (impl == IMPL_NIC_CBF), "undefined implementation" ); 165 165 166 166 soclib_nic_init( nic ); … … 176 176 uint32_t impl = dma->impl; 177 177 178 assert( (impl == IMPL_DMA_SCL), "undefined implementation" );178 assert( __FUNCTION__, (impl == IMPL_DMA_SCL), "undefined implementation" ); 179 179 180 180 soclib_dma_init( dma ); … … 190 190 uint32_t impl = fbf->impl; 191 191 192 assert( (impl == IMPL_FBF_SCL), "undefined implementation" );192 assert( __FUNCTION__, (impl == IMPL_FBF_SCL), "undefined implementation" ); 193 193 194 194 soclib_fbf_init( fbf ); -
trunk/hal/tsar_mips32/core/hal_gpt.c
r658 r679 152 152 153 153 // check page size 154 assert( (CONFIG_PPM_PAGE_SIZE == 4096) , "the TSAR page size must be 4 Kbytes\n" );154 assert( __FUNCTION__, (CONFIG_PPM_PAGE_SIZE == 4096) , "the TSAR page size must be 4 Kbytes\n" ); 155 155 156 156 // allocates 2 physical pages for PT1 … … 423 423 424 424 // check PTE1 : only small and mapped pages can be locked 425 assert( (pte1 & (TSAR_PTE_SMALL | TSAR_PTE_MAPPED)) , "cannot lock a big or unmapped page\n");425 assert( __FUNCTION__, (pte1 & (TSAR_PTE_SMALL | TSAR_PTE_MAPPED)) , "cannot lock a big or unmapped page\n"); 426 426 427 427 #if DEBUG_HAL_GPT_LOCK_PTE … … 537 537 pte1 = hal_remote_l32( pte1_xp ); 538 538 539 assert( ((pte1 & TSAR_PTE_MAPPED) != 0),539 assert( __FUNCTION__, ((pte1 & TSAR_PTE_MAPPED) != 0), 540 540 "PTE1 for vpn %x in cluster %x is unmapped / pte1 = %x\n", vpn, gpt_cxy, pte1 ); 541 541 542 assert( ((pte1 & TSAR_PTE_SMALL ) != 0),542 assert( __FUNCTION__, ((pte1 & TSAR_PTE_SMALL ) != 0), 543 543 "PTE1 for vpn %x in cluster %x is not small / pte1 = %x\n", vpn, gpt_cxy, pte1 ); 544 544 … … 553 553 pte2_attr = hal_remote_l32( pte2_xp ); 554 554 555 assert( ((pte2_attr & TSAR_PTE_LOCKED) != 0),555 assert( __FUNCTION__, ((pte2_attr & TSAR_PTE_LOCKED) != 0), 556 556 "PTE2 for vpn %x in cluster %x is unlocked / pte2_attr = %x\n", vpn, gpt_cxy, pte2_attr ); 557 557 … … 630 630 631 631 // check PT1 entry not mapped 632 assert( (pte1 == 0) , "try to set a big page in an already mapped PTE1\n" );632 assert( __FUNCTION__, (pte1 == 0) , "try to set a big page in an already mapped PTE1\n" ); 633 633 634 634 // check VPN aligned 635 assert( (ix2 == 0) , "illegal vpn for a big page\n" );635 assert( __FUNCTION__, (ix2 == 0) , "illegal vpn for a big page\n" ); 636 636 637 637 // check PPN aligned 638 assert( ((ppn & 0x1FF) == 0) , "illegal ppn for a big page\n" );638 assert( __FUNCTION__, ((ppn & 0x1FF) == 0) , "illegal ppn for a big page\n" ); 639 639 640 640 // set the PTE1 value in PT1 … … 654 654 655 655 // PTE1 must be mapped because PTE2 must be locked 656 assert( (pte1 & TSAR_PTE_MAPPED),656 assert( __FUNCTION__, (pte1 & TSAR_PTE_MAPPED), 657 657 "PTE1 for vpn %x in cluster %x must be mapped / pte1 = %x\n", vpn, gpt_cxy, pte1 ); 658 658 … … 669 669 670 670 // PTE2 must be locked 671 assert( (pte2_attr & TSAR_PTE_LOCKED),671 assert( __FUNCTION__, (pte2_attr & TSAR_PTE_LOCKED), 672 672 "PTE2 for vpn %x in cluster %x must be locked / pte2_attr = %x\n", vpn, gpt_cxy, pte2_attr ); 673 673 … … 894 894 895 895 // check src_pt1 and dst_pt1 existence 896 assert( (src_pt1 != NULL) , "src_pt1 does not exist\n");897 assert( (dst_pt1 != NULL) , "dst_pt1 does not exist\n");896 assert( __FUNCTION__, (src_pt1 != NULL) , "src_pt1 does not exist\n"); 897 assert( __FUNCTION__, (dst_pt1 != NULL) , "dst_pt1 does not exist\n"); 898 898 899 899 // compute SRC indexes … … 1143 1143 1144 1144 // check MAPPED, SMALL, and not LOCKED in attr argument 1145 assert( ((attr & GPT_MAPPED) != 0), "attribute MAPPED must be set in new attributes\n" );1146 assert( ((attr & GPT_SMALL ) != 0), "attribute SMALL must be set in new attributes\n" );1147 assert( ((attr & GPT_LOCKED) == 0), "attribute LOCKED must not be set in new attributes\n" );1145 assert( __FUNCTION__, ((attr & GPT_MAPPED) != 0), "attribute MAPPED must be set in new attributes\n" ); 1146 assert( __FUNCTION__, ((attr & GPT_SMALL ) != 0), "attribute SMALL must be set in new attributes\n" ); 1147 assert( __FUNCTION__, ((attr & GPT_LOCKED) == 0), "attribute LOCKED must not be set in new attributes\n" ); 1148 1148 1149 1149 // get cluster and local pointer on remote GPT … … 1162 1162 1163 1163 // check MAPPED and SMALL in target PTE1 1164 assert( ((pte1 & TSAR_PTE_MAPPED) != 0), "attribute MAPPED must be set in target PTE1\n" );1165 assert( ((pte1 & TSAR_PTE_SMALL ) != 0), "attribute SMALL must be set in target PTE1\n" );1164 assert( __FUNCTION__, ((pte1 & TSAR_PTE_MAPPED) != 0), "attribute MAPPED must be set in target PTE1\n" ); 1165 assert( __FUNCTION__, ((pte1 & TSAR_PTE_SMALL ) != 0), "attribute SMALL must be set in target PTE1\n" ); 1166 1166 1167 1167 // get PT2 base … … 1175 1175 1176 1176 // check MAPPED in target PTE2 1177 assert( ((hal_remote_l32(pte2_attr_xp) & TSAR_PTE_MAPPED) != 0),1177 assert( __FUNCTION__, ((hal_remote_l32(pte2_attr_xp) & TSAR_PTE_MAPPED) != 0), 1178 1178 "attribute MAPPED must be set in target PTE2\n" ); 1179 1179 -
trunk/hal/tsar_mips32/core/hal_switch.S
r625 r679 2 2 * hal_witch.S - CPU context switch function for TSAR-MIPS32 3 3 * 4 * Author Alain Greiner (2016,2017,2018,2019 )4 * Author Alain Greiner (2016,2017,2018,2019,2020) 5 5 * 6 6 * Copyright (c) UPMC Sorbonne Universites -
trunk/hal/tsar_mips32/core/hal_uspace.c
r658 r679 49 49 uint32_t cxy = (uint32_t)GET_CXY( k_dst_xp ); 50 50 51 assert( (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );51 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" ); 52 52 53 53 #if DEBUG_HAL_USPACE … … 147 147 uint32_t cxy = (uint32_t)GET_CXY( k_src_xp ); 148 148 149 assert( (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );149 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" ); 150 150 151 151 #if DEBUG_HAL_USPACE … … 236 236 uint32_t cxy = (uint32_t)GET_CXY( k_dst_xp ); 237 237 238 assert( (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );238 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" ); 239 239 240 240 hal_disable_irq( &save_sr ); … … 291 291 uint32_t cxy = (uint32_t)GET_CXY( k_src_xp ); 292 292 293 assert( (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );293 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" ); 294 294 295 295 hal_disable_irq( &save_sr ); … … 343 343 uint32_t str = (uint32_t)u_str; 344 344 345 assert( (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );345 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" ); 346 346 347 347 hal_disable_irq( &save_sr ); -
trunk/hal/tsar_mips32/core/hal_vmm.c
r656 r679 2 2 * hal_vmm.c - Virtual Memory Manager Initialisation for TSAR 3 3 * 4 * Authors Alain Greiner (2016,2017,2018,2019 )4 * Authors Alain Greiner (2016,2017,2018,2019,2020) 5 5 * 6 6 * Copyright (c) UPMC Sorbonne Universites … … 167 167 168 168 // check vsegs_nr 169 assert( (process_zero.vmm.vsegs_nr == 1 ) ,169 assert( __FUNCTION__, (process_zero.vmm.vsegs_nr == 1 ) , 170 170 "bad vsegs number in kernel VSL = %d\n", process_zero.vmm.vsegs_nr ); 171 171 … … 227 227 uint32_t * pt1 = hal_remote_lpt( XPTR( process_cxy , &vmm->gpt.ptr ) ); 228 228 229 nolock_printk("\n***** VSL and GPT / p rocess %x / cluster %x / PT1%x / cycle %d\n",230 pid , process_cxy , pt1 , (uint32_t)hal_get_cycles() );229 nolock_printk("\n***** VSL and GPT / pid %x / cxy %x / PT1 %x / entry %x / cycle %d\n", 230 pid , process_cxy , pt1 , vmm->entry_point , (uint32_t)hal_get_cycles() ); 231 231 232 232 if( xlist_is_empty( vsl_root_xp ) )
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