Ignore:
Timestamp:
Jan 13, 2021, 12:47:53 AM (4 years ago)
Author:
alain
Message:

cosmetic

Location:
trunk/hal/tsar_mips32/core
Files:
7 edited

Legend:

Unmodified
Added
Removed

  • trunk/hal/tsar_mips32/core/hal_context.c

    r679 r686  
    22 * hal_context.c - implementation of Thread Context API for TSAR-MIPS32
    33 *
    4  * Author  Alain Greiner    (2016,2017,2018,2019)
     4 * Author  Alain Greiner    (2016,2017,2018,2019,2019)
    55 *
    66 * Copyright (c)  UPMC Sorbonne Universites
    … …  
    121121{
    122122
    123 assert( __FUNCTION__, (sizeof(hal_cpu_context_t) <= CONFIG_CPU_CTX_SIZE), "illegal CPU context size" );
     123assert( __FUNCTION__, (sizeof(hal_cpu_context_t) <= CONFIG_CPU_CTX_SIZE),
     124"illegal CPU context size" );
    124125
    125126    // allocate memory for cpu_context
    126     kmem_req_t  req;
    127     req.type   = KMEM_KCM;
    128     req.order  = bits_log2( sizeof(hal_cpu_context_t) );
    129     req.flags  = AF_KERNEL | AF_ZERO;
    130 
    131     hal_cpu_context_t * context = kmem_alloc( &req );
    132 
     127    hal_cpu_context_t * context = kmem_alloc( bits_log2( sizeof(hal_cpu_context_t) ),
     128                                              AF_KERNEL | AF_ZERO);
    133129    if( context == NULL ) return -1;
    134130
    … …  
    152148    hal_cpu_context_t * context = (hal_cpu_context_t *)thread->cpu_context;
    153149
    154 assert( __FUNCTION__, (context != NULL ), "CPU context not allocated" );
     150assert( __FUNCTION__, (context != NULL ),
     151"CPU context not allocated" );
    155152
    156153    // compute the PPN for the GPT PT1
    … …  
    405402void hal_cpu_context_destroy( thread_t * thread )
    406403{
    407     kmem_req_t          req;
    408 
     404    // get pointer on CPU context
    409405    hal_cpu_context_t * ctx = thread->cpu_context;
    410406
    411407    // release CPU context if required
    412     if( ctx != NULL )
    413     {   
    414         req.type = KMEM_KCM;
    415         req.ptr  = ctx;
    416         kmem_free( &req );
    417     }
     408    if( ctx != NULL )  kmem_free( ctx , bits_log2( sizeof(hal_cpu_context_t)) );
    418409
    419410}  // end hal_cpu_context_destroy()
    … …  
    434425
    435426    // allocate memory for fpu_context
    436     kmem_req_t  req;
    437     req.type   = KMEM_KCM;
    438     req.flags  = AF_KERNEL | AF_ZERO;
    439     req.order  = bits_log2( sizeof(hal_fpu_context_t) );
    440 
    441     hal_fpu_context_t * context = kmem_alloc( &req );
     427    hal_fpu_context_t * context = kmem_alloc( bits_log2( sizeof(hal_fpu_context_t) ),
     428                                              AF_KERNEL | AF_ZERO );
    442429
    443430    if( context == NULL ) return -1;
    … …  
    454441    hal_fpu_context_t * context = thread->fpu_context;
    455442
    456     assert( __FUNCTION__, (context != NULL) , "fpu context not allocated" );
     443assert( __FUNCTION__, (context != NULL) ,
     444"fpu context not allocated" );
    457445
    458446    memset( context , 0 , sizeof(hal_fpu_context_t) );
    … …  
    478466void hal_fpu_context_destroy( thread_t * thread )
    479467{
    480     kmem_req_t  req;
    481 
    482     hal_fpu_context_t * context = thread->fpu_context;
     468    // get pointer on FPU context
     469    hal_fpu_context_t * ctx = thread->fpu_context;
    483470
    484471    // release FPU context if required
    485     if( context != NULL )
    486     {   
    487         req.type = KMEM_KCM;
    488         req.ptr  = context;
    489         kmem_free( &req );
    490     }
     472    if( ctx != NULL ) kmem_free( ctx , bits_log2( sizeof(hal_fpu_context_t)) );
    491473
    492474}  // end hal_fpu_context_destroy()

  • trunk/hal/tsar_mips32/core/hal_drivers.c

    r679 r686  
    22 * hal_drivers.c - Driver initializers for TSAR
    33 *
    4  * Copyright (c) 2017 Maxime Villard
     4 * Author        Maxime Villard (2017)
     5 *
     6 * Copyright (c) UPMC Sorbonne Universites
    57 *
    68 * This file is part of ALMOS-MKH.

  • trunk/hal/tsar_mips32/core/hal_exception.c

    r635 r686  
    228228            // try to map the unmapped PTE
    229229            error = vmm_handle_page_fault( process,
    230                                            bad_vaddr >> CONFIG_PPM_PAGE_SHIFT );
     230                                           bad_vaddr >> CONFIG_PPM_PAGE_ORDER );
    231231
    232232            if( error == EXCP_NON_FATAL )            // page-fault successfully handled
    … …  
    278278            // try to handle a possible COW
    279279            error = vmm_handle_cow( process,
    280                                     bad_vaddr >> CONFIG_PPM_PAGE_SHIFT );
     280                                    bad_vaddr >> CONFIG_PPM_PAGE_ORDER );
    281281
    282282            if( error == EXCP_NON_FATAL )        // COW successfully handled
    … …  
    358358    remote_busylock_acquire( lock_xp );
    359359
    360     nolock_printk("\n=== thread(%x,%x) / core[%d] / cycle %d ===\n",
    361     process->pid, this->trdid, core->lid, (uint32_t)hal_get_cycles() );
     360    nolock_printk("\n=== thread(%x,%x) / core[%x,%d] / cycle %d ===\n",
     361    process->pid, this->trdid, process->pid, core->lid, (uint32_t)hal_get_cycles() );
    362362
    363363        nolock_printk("busylocks = %d / blocked_vector = %X / flags = %X\n\n",

  • trunk/hal/tsar_mips32/core/hal_gpt.c

    r679 r686  
    22 * hal_gpt.c - implementation of the Generic Page Table API for TSAR-MIPS32
    33 *
    4  * Author   Alain Greiner (2016,2017,2018,2019)
     4 * Author   Alain Greiner (2016,2017,2018,2019,2020)
    55 *
    66 * Copyright (c) UPMC Sorbonne Universites
    … …  
    3737
    3838////////////////////////////////////////////////////////////////////////////////////////
     39// The Page Table for the TSAR-MIPS32 MMU is defined as a two levels radix tree.
     40//
     41// It defines two page sizes : 4 Kbytes pages, and 2 Mbytes pages.
     42// The virtual address space size is 4 Gbytes (32 bits virtual addresses).
     43// The physical address space is limited to 1 Tbytes (40 bits physical addresses).
     44// - For a 4 Kbytes page, the VPN uses 20 bits, and the PPN requires 28 bits.
     45// - For a 2 Mbytes page, the PPN uses 11 bits, and the PPN requires 19 bits.
     46//
     47// The first level array (PT1) contains 2048 entries, each entry contains 4 bytes,
     48// and this array is aligned on a 8K bytes boundary.
     49//
     50// The second level array (PT2) contains 512 entries, each entry contains 8 bytes,
     51// and this array is ligned on a 4K bytes boundary.
     52////////////////////////////////////////////////////////////////////////////////////////
     53
     54
     55////////////////////////////////////////////////////////////////////////////////////////
    3956// This define the masks for the TSAR MMU PTE attributes (from TSAR MMU specification)
    4057////////////////////////////////////////////////////////////////////////////////////////
    … …  
    152169
    153170// check page size
    154 assert( __FUNCTION__, (CONFIG_PPM_PAGE_SIZE == 4096) , "the TSAR page size must be 4 Kbytes\n" );
    155 
    156     // allocates 2 physical pages for PT1
    157         kmem_req_t req;
    158         req.type  = KMEM_PPM;
    159         req.order = 1;                     // 2 small pages
    160         req.flags = AF_KERNEL | AF_ZERO;
    161         base = kmem_alloc( &req );
     171assert( __FUNCTION__, (CONFIG_PPM_PAGE_SIZE == 4096) ,
     172"the TSAR page size must be 4 Kbytes\n" );
     173
     174    // allocates 8 Kbytes for PT1
     175        base = kmem_alloc( 13 , AF_ZERO );
    162176
    163177        if( base == NULL )
    … …  
    197211    uint32_t   * pt2;
    198212    uint32_t     attr;
    199         kmem_req_t   req;
    200213
    201214    thread_t * this = CURRENT_THREAD;
    … …  
    241254                }
    242255
    243                 // release the page allocated for the PT2
    244                 req.type = KMEM_PPM;
    245                 req.ptr  = pt2;
    246                 kmem_free( &req );
     256                // release the 4K bytes allocated for the PT2
     257                kmem_free( pt2 , 12 );
    247258            }
    248259        }
    249260        }
    250261
    251     // release the PT1
    252     req.type = KMEM_PPM;
    253     req.ptr  = pt1;
    254     kmem_free( &req );
     262    // release the 8K bytes allocated for PT1
     263    kmem_free( pt1 , 13 );
    255264
    256265#if DEBUG_HAL_GPT_DESTROY
    … …  
    272281    xptr_t              pte1_xp;         // extended pointer on PT1[x1] entry
    273282        uint32_t            pte1;            // value of PT1[x1] entry
    274 
    275     kmem_req_t          req;             // kmem request fro PT2 allocation
    276 
    277283    uint32_t          * pt2;             // local pointer on PT2 base
    278284        ppn_t               pt2_ppn;         // PPN of page containing PT2
    … …  
    334340            hal_disable_irq( &sr_save );
    335341
    336             req.type  = KMEM_PPM;
    337             req.order = 0; 
    338             req.flags = AF_ZERO | AF_KERNEL;
    339             pt2       = kmem_remote_alloc( gpt_cxy , &req );
     342            // allocate a 4K bytes PT2
     343            pt2       = kmem_remote_alloc( gpt_cxy , 12 , AF_ZERO );
    340344
    341345            if( pt2 == NULL )
    … …  
    863867    uint32_t   * dst_pt2;   // local pointer on DST PT2
    864868
    865         kmem_req_t   req;       // for PT2 allocation
    866 
    867869    uint32_t     src_pte1;
    868870    uint32_t     dst_pte1;
    … …  
    917919        if( (dst_pte1 & TSAR_PTE_MAPPED) == 0 )
    918920        {
    919             // allocate one physical page for a new PT2
    920                 req.type  = KMEM_PPM;
    921                 req.order = 0;                     // 1 small page
    922                 req.flags = AF_KERNEL | AF_ZERO;
    923                 dst_pt2   = kmem_alloc( &req );
     921            // allocate one 4K bytes physical page for a new PT2
     922                dst_pt2   = kmem_alloc( 12 , AF_ZERO );
    924923
    925924            if( dst_pt2 == NULL )

  • trunk/hal/tsar_mips32/core/hal_ppm.c

    r632 r686  
    7979
    8080        // compute number of pages required to store page descriptor array
    81         uint32_t pages_tbl_nr = bytes >> CONFIG_PPM_PAGE_SHIFT;
     81        uint32_t pages_tbl_nr = bytes >> CONFIG_PPM_PAGE_ORDER;
    8282
    8383        // compute total number of reserved pages (kernel code & pages_tbl[])
    … …  
    9090        ppm->vaddr_base = NULL;
    9191        ppm->pages_tbl  = (page_t*)( ppm->vaddr_base +
    92                                      (pages_tbl_offset << CONFIG_PPM_PAGE_SHIFT) );
     92                                     (pages_tbl_offset << CONFIG_PPM_PAGE_ORDER) );
    9393
    9494        // initialize all page descriptors in pages_tbl[]

  • trunk/hal/tsar_mips32/core/hal_special.c

    r658 r686  
    22 * hal_special.c - implementation of Generic Special Register Access API for TSAR-MIPS32
    33 *
    4  * Author    Alain Greiner (2016,2017)
     4 * Author    Alain Greiner (2016,2017,2018,2019,2020)
    55 *
    66 * Copyright (c) UPMC Sorbonne Universites
    … …  
    5555// For the TSAR architecture, this function register the physical address of
    5656// the first level page table (PT1) in the PTPR register.
    57 // It activates the intructions MMU, and de-activates the data MMU.
     57// It activates the intructions MMU, and de-activates the data MMU, that is NOT
     58// used by the kernel for 32 bits architectures.
    5859/////////////////////////////////////////////////////////////////////////////////
    5960void hal_mmu_init( gpt_t * gpt )

  • trunk/hal/tsar_mips32/core/hal_uspace.c

    r679 r686  
    4949    uint32_t cxy = (uint32_t)GET_CXY( k_dst_xp );
    5050 
    51 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );
     51assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0),
     52"must be called by an user thread" );
    5253
    5354#if DEBUG_HAL_USPACE
    … …  
    147148    uint32_t cxy = (uint32_t)GET_CXY( k_src_xp );
    148149
    149 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );
     150assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0),
     151"must be called by an user thread" );
    150152
    151153#if DEBUG_HAL_USPACE
    … …  
    236238    uint32_t cxy = (uint32_t)GET_CXY( k_dst_xp );
    237239
    238 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );
     240assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0),
     241"must be called by an user thread" );
    239242
    240243    hal_disable_irq( &save_sr );
    … …  
    291294    uint32_t cxy = (uint32_t)GET_CXY( k_src_xp );
    292295
    293 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );
     296assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0),
     297"must be called by an user thread" );
    294298
    295299    hal_disable_irq( &save_sr );
    … …  
    343347    uint32_t str   = (uint32_t)u_str;
    344348
    345 assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0), "must be called by an user thread" );
     349assert( __FUNCTION__, (CURRENT_THREAD->process->pid > 0),
     350"must be called by an user thread" );
    346351
    347352    hal_disable_irq( &save_sr );
    … …  
    352357        "mfc2   $15,   $1           \n"   /* $15 <= MMU_MODE (DTLB off)     */
    353358        "ori    $14,   $15,  0x4    \n"   /* $14 <= mode DTLB on            */
     359        "mtc2   $14,   $1                       \n"   /* set DTLB on                    */
    354360        "1:                         \n"
    355         "mtc2   $14,   $1                       \n"   /* set DTLB on                    */
    356361        "lb         $12,   0($13)       \n"   /* $12 <= one byte from u_space   */
     362        "beq    $12,   $0,   2f     \n"   /* exit loop when NUL found       */
     363        "addi   $13,   $13,  1      \n"   /* increment address              */
     364        "j                   1b     \n"   /* jump to next iteration         */
     365        "addi   %0,    %0,   1      \n"   /* increment count if not NUL     */
     366        "2:                         \n"
    357367        "mtc2   $15,   $1                       \n"   /* set DTLB off                   */
    358         "addi   $13,   $13,  1      \n"   /* increment address              */
    359         "bne    $12,   $0,   1b     \n"   /* loop until NUL found           */
    360         "addi   %0,    %0,   1      \n"   /* increment count                */
    361368        ".set reorder               \n"
    362369        : "+r"(count)
Note: See TracChangeset for help on using the changeset viewer.