Changes between Version 40 and Version 41 of boot_procedure

Timestamp:

Feb 26, 2019, 3:16:26 PM (6 years ago)

Author:

alain

Comment:

--

boot_procedure

@@ -31 +31 @@
 == B) __Boot-loader for the TSAR architecture__ ==
 
-The TSAR boot-loader uses an OS-independent '''pre-loader''', stored in an external ROM, and in charge of loading the TSAR
+The TSAR boot-loader uses an OS-independent '''pre-loader''', stored in an external ROM, that load the TSAR
 '''boot-loader''' code from an external block-device to the memory. This preloader is specific for the TSAR architecture, but independent on the Operating System. It is used by ALMOS-MKH, but also by LINUX, NetBSD, ALMOS_MKH, or the GIET-VM.  
 
@@ -43 +43 @@
  || execution stacks (one per core)   ||  BOOT_STACK_SIZE (1 Mb)           ||  BOOT_STACK_BASE (0x500000)  ||
 
-The values given in this array are configuration parameters, that can be redefined in the '''boot_config.h''' file.
-This memory is only used for temporary storage : when the TSAR boot_loader completes, and transfer control to the kernel_init procedure,
+The values given in this array are indicative. The actual values are defined by configuration parameters in the '''boot_config.h''' file.
+These memory zones are only used for temporary storage : when the TSAR boot_loader completes, and transfer control to the kernel_init procedure,
 the kernel code (i.e. the code and data segments) has been copied - in each cluster - in the lowest part of the cluster physical memory. 
 The four pages (16 Kbytes) reserved for the prelloader are only used in cluster 0.
 
-
 A core is identified by  two indexes[cxy][lid] : ''cxy'' is the cluster identifier, an ''lid'' is the core local index in cluster cxy.
-In all clusters, the core with local index 0 is called ''CP0''. 
+In all clusters, the core with local index 0 is called ''Core0''. 
 
 We describe below the four phases for the TSAR boot-loader:
@@ -56 +55 @@
 === B1. Preloader phase ===
 
-At reset, the extension address registers (for both data and instructions) in all cores[cxy][lid] contain the 0 value.
+At reset, the MMU is de-activated, and the extension address registers (for both data and instructions) in all cores[cxy][lid] contain the 0 value.
 Therefore, all cores can only access the physical address space of cluster 0.
  * In the TSAR_LETI architecture, the preloader is loaded in the first 16 kbytes of the RAM located in cluster 0.
  * In the TSAR_IOB architecture, the preloader is stored in an external ROM, that is accessed throug the IO_bridge located in cluster 0.
 
-All cores execute the same preloader code, but the work done depends on the core identifier. The core[0][0] (i.e. CP0 in cluster 0) load
+All cores execute the same preloader code, but the work done depends on the core identifier. The core[0][0] (i.e. Core0 in cluster 0) load
 in local memory of cluster 0, the boot-loader code. All other cores do only one task before going to sleep (low-power) state:
 each core activates its private WTI channel in the local ICU (Interrupt Controller Unit) to be wake-up by core [0][0], using an
@@ -75 +74 @@
     * The core[0][0] initializes the stack pointer. The boot stack size is a configuration parameter.
     * The core[0][0] initializes 2 peripherals: The '''TTY'''terminal (channel 0)  to display log info, and the '''IOC''' to access the disk.
-    *  loads in cluster 0 the '''arch_info.bin''' file and the  ainsi que l'image binaire du noyau d'ALMOS-MK, respectivement à l'adresse '''0x200000''' et '''0x400000''', juste au dessus du segment mémoire correspondant à l'image du boot-loader. 
-    * Il utilise les informations contenues dans la structure '''arch_info.bin''' pour initialiser les différents champs de la structure '''boot_info_t''' du cluster de boot.
-    * The core [0][0] send IPIs to all cores [i][0] in other clusters.
+    * The core[0][0] loads in cluster 0 the '''arch_info.bin''' file and the  '''kernel.elf''' file at addresses ARCHINFO_BASE and KERN_BASE respectively.
+    * The core[0][0] uses the '''arch_info.bin'''structure to initialize  the local '''boot_info_t''' structure in cluster 0.
+    * The core[0][0] send IPIs to activate all cores [i][0] in all other clusters.
     
-All CP0 cores synchronize through a synchronisation barrier before entering the next phase.
-This shows the memory content after this second phase.
+All Core0 in all clusters synchronize through a synchronisation barrier before entering the next phase.
+This shows the memory content after this phase.
    [[Image(Phys_Mem2.svg)]]
 
 === B3. partially parallel phase ===
 
-Dans chaque cluster, le coeur '''CP0''', réveillé par le CP0 du cluster de boot, sort du preloader et exécute le code du boot-loader qui se trouve toujours stocké dans la mémoire physique du cluster(0,0), pour effectuer les tâches suivantes:
-    * Il analyse le contenu de la structure '''arch_info.bin''' (toujours stocké dans la mémoire physique du cluster de boot) en parcourant le tableau de descripteurs de core pour retrouver son identificateur de cluster '''cxy'''. Notons que cette étape est exécutée parallèlement par tous les '''CP0''', ce qui entraine une contention au banc mémoire contenant ce tableau des descripteurs des coeurs.
-    * Il peut maintenant, à partir de son '''cxy''', mettre à jour ses registres d'extension d'adresse pour accéder à la mémoire physique du cluster dans lequel il se trouve. Néanmoins, il continue à accéder au code de boot stocké dans le cluster (0,0) tant que le code du boot-loader n'a pas été copiée dans son banc de mémoire local. 
-    * Il alloue sa pile de boot en initialisant son pointeur de pile à l'adresse '''0x600000''' dans l'espace adressable physique son cluster.
-    * Il copie l'image du boot-loader et le fichier '''arch_info.bin''' aux mêmes adresses, respectivement '''0x100000''' et '''0x200000''', dans la mémoire physique locale. À partir d'ici, chaque '''CP0''' peut exécuter le code du boot-loader en local.
+In each cluster(i), the core[I][0] exécutes the boot-loader code (stored in physical memory of cluster 0), to do he following tasks:
+    * each core[i][0] analyses the '''arch_info.bin''' structure (stored in physical memory of cluster 0), to search his own cluster identifier '''cxy'''. This is done in parallel by all cores[i][0], and can create contention.
+    * each core[i][0] updates its own extended address register to access the data stored in its local physical memory. Nevertheless, it still access to the boot code stored in cluster(0), as long as the code has not been copied in local cluster. 
+    * each core[i][0] allocates a private stack at address BOOT_STACK_BASE in its local memory.
+    * each core[i][0] copy l'image du boot-loader et le fichier '''arch_info.bin''' aux mêmes adresses, respectivement '''0x100000''' et '''0x200000''', dans la mémoire physique locale. À partir d'ici, chaque '''CP0''' peut exécuter le code du boot-loader en local.
     * Il copie ensuite l'image du noyau à l'adresse '''0x4000''' de la mémoire physique locale de son cluster (c'est à dire, juste après les quatre pages réservées au prélasser). 
     * Il utilise la structure '''arch_info.bin''' locale pour initialiser les différents champs de la structure '''boot_info_t''' de son cluster. Cette tâche n'utilise que des accès mémoire locaux puisque toutes les informations nécessaires sont disponibles localement.
@@ -96 +95 @@
     * Les '''CP0''' se mettent en attente jusqu'à ce que tous les autres cores arrivent à ce point de rendez-vous en utilisant le mécanisme de barrière de synchronisation.
 
-   Voici le contenu de la mémoire du cluster de boot et des autres clusters (appelés ''banalus'') après cette troisième étape.
+This shows the memory content after this phase.  
    [[Image(Phys_Mem3.svg)]]