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1Microelectronic allows the integration of complicated functions into products, to increase their
2commercial attractivity and to improve their competitivity. Multimedia and communication
3sectors have taken advantage from microelectronics facilities thanks to the developpment of
4design methodologies and tools for real time embedded systems. Many other sectors could
5benefit from microelectronics if these methologies and tools were adapted to their features.
6The Non Recurring Engineering (NRE) costs involded in designing and manufacturing an ASIC is
7very high. An IC foundry costs several billions of euros and the fabrication
8of a specific circuit costs several millions. For example a conservative estimate for a 65nm ASIC project is 10 million USD.
9Consequently, it is generally unfeasible to design and fabricate ASICs in
10low volumes and ICs are designed to cover a broad applications spectrum at the cost of
11performance degradation.
12\\
13Today, FPGAs become important actors in the computational domain that was originally dominated
14by microprocessors and ASICs. Just like microprocessors, FPGA based systems can be reprogrammed
15on a per-application basis. At the same time, for many applications, FPGAs offer significant performance benefits over
16microprocessors implementation. Although these benefits are still
17generally an order of magnitude less than in equivalent ASIC implementations, low costs
18(500 euros to 10K euros), fast time to market and flexibility of FPGAs make them an attractive
19choice for low-to-medium volume applications.
20Since their introduction in the mid eighties, FPGAs evolved from a simple,
21low-capacity gate array to devices (Altera STRATIX III, Xilinx Virtex V) that
22provide a mix of coarse-grained data path units, memory blocks, microprocessor cores,
23on chip A/D conversion, and gate counts by millions. This high logic capacity allows to implement
24complex systems like multi-processors platform with application dedicated coprocessors.
25Table~\ref{fpga_market} shows the estimation of FPGA worldwide market in the next years in
26various application domains. The ``high end'' lines concern only FPGA with high logic capacity for complex system implementations.
27This market is in significant expansion and is estimated to 914\,M\$ in 2012.
28Using FPGA limits the NRE costs to the design cost. This boosts the developpment of of automatic design tools and methodologies.
29
30\begin{table}\leavevmode\center
31\begin{tabular}{|l|l|l|l|}\hline
32Segment         & 2010  & 2011  & 2012 \\\hline\hline
33Communications  & 1,867 & 1,946 & 2,096 \\
34High end        & 467   & 511   & 550 \\\hline
35Consumer        & 550   & 592   & 672 \\
36High end        & 53    & 62    & 75 \\\hline
37Automotive      & 243   & 286   & 358 \\
38High end        & -     & -     & - \\\hline
39Industrial      & 1,102 & 1,228 & 1,406 \\
40High end        & 177   & 188   & 207 \\\hline
41Military/Aereo  & 566   & 636   & 717 \\
42High end        & 56    & 65    & 82 \\\hline\hline
43Total FPGA/PLD  & 4,659 & 5,015 & 5,583 \\
44Total High-End  FPGA    & 753   & 826   & 914 \\\hline
45\end{tabular}
46\caption{\label{fpga_market} Gartner estimation of worldwide FPGA/PLD consumption (Millions \$)}
47\end{table}
48\par
49Today, several companies (atipa, blue-arc, Bull, Chelsio, Convey, CRAY, DataDirect, DELL, hp,
50Wild Systems, IBM, Intel, Microsoft, Myricom, NEC, nvidia etc) are making systems where demand
51for very high performance (HPC) primes over other requirements. They tend to use the highest
52performing devices like Multi-core CPUs, GPUs, large FPGAs, custom ICs and the most innovative
53architectures and algorithms. These companies show up in different "traditional" applications and market
54segments like computing clusters (ad-hoc), servers and storage, networking and Telecom, ASIC
55emulation and prototyping, Mil/aero etc. The HPC market size is estimated today by FPGA providers
56at 214\,M\$.
57This market is dominated by Multi-core CPUs and GPUs based solutions and the expansion
58of FPGA-based solutions is limited by the lack of design flow automation. Nowadays, there are neither commercial
59nor academic  tools covering the whole design process.
60For instance, with SOPC Builder from Altera, users can select and parameterize IP components
61from an extensive drop-down list of communication, digital signal processor (DSP), microprocessor
62and bus interface cores, as well as incorporate their own IP. Designers can then generate
63a synthesized netlist, simulation test bench and custom software library that reflect the hardware
64configuration.
65Nevertheless, SOPC Builder does not provide any facilities to synthesize coprocessors\emph{I
66(Steven) disagree : the C2H compiler bundled with SOPCBuilder does a pretty good job at this} and to
67simulate the platform at a high design level (systemC).
68In addition, SOPC Builder is proprietary and only works together with Altera's Quartus compilation
69tool to implement designs on Altera devices (Stratix, Arria, Cyclone).
70PICO [CITATION] and CATAPULT [CITATION] allow to synthesize coprocessors from a C++ description.
71Nevertheless, they can only deal with data dominated applications and they do not handle the platform level.
72The Xilinx System Generator for DSP [http://www.xilinx.com/tools/sysgen.htm] is a plug-in to
73Simulink that enables designers to develop high-performance DSP systems for Xilinx FPGAs.
74Designers can design and simulate a system using MATLAB and Simulink. The tool will then
75automatically generate synthesizable Hardware Description Language (HDL) code mapped to Xilinx
76pre-optimized algorithms.
77However, this tool targets only DSP based algorithms.
78\\
79Consequently, designers developping an embedded system needs to master for example
80SoCLib for design exploration,
81SOPC Builder at the platform level,
82PICO for synthesizing the data dominated coprocessors
83and Quartus for design implementation.
84This requires an important tools interfacing effort and makes the design process very complex
85and achievable only by designers skilled in many domains.
86The aim of the COACH project is to integrate all these tools in the same framework and to allow \textbf{pure software} developpers to realize embedded systems.
87\par
88The combination of the framework dedicated to software developpers and FPGA target, allows to gain
89market share over Multi-core CPUs and GPUs HPC based solutions.
90Moreover, one can expect that small and even very small companies will be able to propose embedded
91system and accelerating solutions for standard software applications with acceptable prices, thanks
92 to the elimination of huge hardware investment in opposite to ASIC based solution.
93\\
94This new market may explode in the same way as the micro-computer matket in the eighties. This success was due
95to the low cost of the first micro-processors (compared to main frames) and the advent of high level
96programming languages which allowed a high number of programmers to launch start-ups in software
97engineering.
98
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