Changeset 32 for anr/section-2.1.tex

Timestamp:

Jan 13, 2010, 3:20:27 PM (14 years ago)

Author:

coach

Message:

amélioration de la section 2.1

M anr/section-2.tex
M anr/section-2.1.tex

File:

• anr/section-2.1.tex (modified) (6 diffs)

anr/section-2.1.tex

@@ -1 @@
-Microelectronic allows to integrate complicated functions into products, to increase their
+Microelectronic allows the integration of complicated functions into products, to increase their
 commercial attractivity and to improve their competitivity. Multimedia and communication
-sectors have taken advantage from microelectronics facilities thanks to developpment of
+sectors have taken advantage from microelectronics facilities thanks to the developpment of
 design methodologies and tools for real time embedded systems. Many other sectors could
-benefit from microelectronics if these methologies and tools are adapted to their features.
+benefit from microelectronics if these methologies and tools were adapted to their features.
 The Non Recurring Engineering (NRE) costs involded in designing and manufacturing an ASIC is 
-very high. It costs several milliars of euros for IC factory and several millions to fabricate
-a specific circuit for example a conservative estimate for a 65nm ASIC project is 10 million USD. 
+very high. An IC foundry costs several billions of euros and the fabrication
+of a specific circuit costs several millions. For example a conservative estimate for a 65nm ASIC project is 10 million USD. 
 Consequently, it is generally unfeasible to design and fabricate ASICs in
 low volumes and ICs are designed to cover a broad applications spectrum at the cost of
@@ -12 +12 @@
 \\
 Today, FPGAs become important actors in the computational domain that was originally dominated
-by microprocessors and ASICs. Just like microprocessors FPGA based systems can be reprogrammed
-on a per-application basis. At the same time, FPGAs offer significant performance benefits over
-microprocessors implementation for a number of applications. Although these benefits are still
-generally an order of magnitude less than equivalent ASIC implementations, low costs 
+by microprocessors and ASICs. Just like microprocessors, FPGA based systems can be reprogrammed
+on a per-application basis. At the same time, for many applications, FPGAs offer significant performance benefits over
+microprocessors implementation. Although these benefits are still
+generally an order of magnitude less than in equivalent ASIC implementations, low costs 
 (500 euros to 10K euros), fast time to market and flexibility of FPGAs make them an attractive 
 choice for low-to-medium volume applications. 
 Since their introduction in the mid eighties, FPGAs evolved from a simple, 
-low-capacity gate array technology to devices (Altera STRATIX III, Xilinx Virtex V) that
+low-capacity gate array to devices (Altera STRATIX III, Xilinx Virtex V) that
 provide a mix of coarse-grained data path units, memory blocks, microprocessor cores, 
 on chip A/D conversion, and gate counts by millions. This high logic capacity allows to implement
 complex systems like multi-processors platform with application dedicated coprocessors. 
-Table~\ref{fpga_market} shows the estimation of FPGA worldwide market in the next years covering 
-various application domains. The ``high end'' lines concern only FPGA with high logic capacity able 
-to implement complex systems. 
+Table~\ref{fpga_market} shows the estimation of FPGA worldwide market in the next years in
+various application domains. The ``high end'' lines concern only FPGA with high logic capacity for complex system implementations. 
 This market is in significant expansion and is estimated to 914\,M\$ in 2012.
-Using FPGA limits the NRE costs to design cost. This boosts the developpment of methodologies
-and tools to automize design and reduce its cost.
+Using FPGA limits the NRE costs to the design cost. This boosts the developpment of of automatic design tools and methodologies.
+
 \begin{table}\leavevmode\center
 \begin{tabular}{|l|l|l|l|}\hline
@@ -52 +51 @@
 for very high performance (HPC) primes over other requirements. They tend to use the highest 
 performing devices like Multi-core CPUs, GPUs, large FPGAs, custom ICs and the most innovative 
-architectures and algorithms. Companies show up in different "traditional" applications and market 
+architectures and algorithms. These companies show up in different "traditional" applications and market 
 segments like computing clusters (ad-hoc), servers and storage, networking and Telecom, ASIC 
-emulation and prototyping, Mil/aero etc. HPC market size is estimated today by FPGA providers 
-to 214\,M\$. 
+emulation and prototyping, Mil/aero etc. The HPC market size is estimated today by FPGA providers 
+at 214\,M\$. 
 This market is dominated by Multi-core CPUs and GPUs based solutions and the expansion 
-of FPGA-based solutions is limited by the flow automation. Nowadays, there are neither commercial 
-nor free tools covering the whole design process.
+of FPGA-based solutions is limited by the lack of design flow automation. Nowadays, there are neither commercial 
+nor academic  tools covering the whole design process.
 For instance, with SOPC Builder from Altera, users can select and parameterize IP components 
 from an extensive drop-down list of communication, digital signal processor (DSP), microprocessor 
@@ -66 +65 @@
 Nevertheless, SOPC Builder does not provide any facilities to synthesize coprocessors\emph{I
 (Steven) disagree : the C2H compiler bundled with SOPCBuilder does a pretty good job at this} and to
-simulate the platform at a high design level (system C). 
+simulate the platform at a high design level (systemC). 
 In addition, SOPC Builder is proprietary and only works together with Altera's Quartus compilation
 tool to implement designs on Altera devices (Stratix, Arria, Cyclone).
 PICO [CITATION] and CATAPULT [CITATION] allow to synthesize coprocessors from a C++ description.
-Nevertheless, they can only deal with data dominated applications and they do not handle the
-platform level.
+Nevertheless, they can only deal with data dominated applications and they do not handle the platform level.
 The Xilinx System Generator for DSP [http://www.xilinx.com/tools/sysgen.htm] is a plug-in to 
 Simulink that enables designers to develop high-performance DSP systems for Xilinx FPGAs. 
@@ -81 +79 @@
 Consequently, designers developping an embedded system needs to master for example
 SoCLib for design exploration,
-SOPC Builde at the platform level, 
+SOPC Builder at the platform level, 
 PICO for synthesizing the data dominated coprocessors
 and Quartus for design implementation.
 This requires an important tools interfacing effort and makes the design process very complex 
 and achievable only by designers skilled in many domains.
-COACH project integrates all these tools in the same framework masking them to the user. 
-The objective is to allow \textbf{pure software} developpers to realize embedded systems.
+The aim of the COACH project is to integrate all these tools in the same framework and to allow \textbf{pure software} developpers to realize embedded systems.
 \par
 The combination of the framework dedicated to software developpers and FPGA target, allows to gain 
@@ -95 +92 @@
  to the elimination of huge hardware investment in opposite to ASIC based solution.
 \\
-This new market may explose like it was done by micro-computing in eighties. This success were due 
-to the low cost of first micro-computers (compared to main frame) and the advent of high level 
-programming languages that allow a high number of programmers to launch start-ups in software
+This new market may explode in the same way as the micro-computer matket in the eighties. This success was due 
+to the low cost of the first micro-processors (compared to main frames) and the advent of high level 
+programming languages which allowed a high number of programmers to launch start-ups in software
 engineering.