[21] | 1 | \begin{taskinfo} |
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| 2 | \let\UPMC\leader |
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| 3 | \let\ALL\enable |
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| 4 | \end{taskinfo} |
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| 5 | % |
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| 6 | \begin{objectif} |
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| 7 | This task relies to the main features for embedded system. |
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| 8 | Its objective consists of the specification of designer input, of the |
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| 9 | definition of the hardware architectural templates and of all the features |
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| 10 | that the HAS tools share. |
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| 11 | \end{objectif} |
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| 12 | % |
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[27] | 13 | \begin{workpackage}{D1} |
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[21] | 14 | \item This \ST specifies COACH for the system designer. At this |
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[36] | 15 | level COACH is a black box. The deliverables aredocuments allowing the system |
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[21] | 16 | designers to use COACH: feeding it (inputs), how to use it (design flow), |
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| 17 | what COACH can generate (definition of the generic architecture of the |
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| 18 | MPSoC and its 3 targets hardware mapping). |
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| 19 | \begin{livrable} |
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[36] | 20 | \item{V1}{0}{6}{d}{\Supmc}{COACH user manual} \setMacroInAuxFile{specGenManualI} |
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| 21 | It is the first milestone of the COACH user manual that will allow demonstrator |
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| 22 | \STs to start. |
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| 23 | It contains the general description of the framework, the design flow and the |
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| 24 | description of the architectural templates. |
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| 25 | It refers to the HAS user manual (delivrable {\specHasManual}) and |
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| 26 | to the CSG manual (delivrable \specCsgManual) for the COACH input |
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| 27 | descriptions. |
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| 28 | \item{VF}{6}{12}{d}{\Supmc}{COACH user manual} \setMacroInAuxFile{specGenManual} |
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| 29 | The COACH user manual of the \specGenManualI delivrable updated with the feed-backs |
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| 30 | of the demonstrator \STs. |
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| 31 | \item{V1}{0}{6}{d}{\Stima}{CSG user manual} \setMacroInAuxFile{specCsgManualI} |
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| 32 | It is the first milestone of the CSG user manual that will allow demonstrator |
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| 33 | \STs to start. |
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| 34 | It describes how the task graph is described, the communication schems and its |
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| 35 | associated API (Application Programming Interface). |
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| 36 | The base is the SRL library and MWMR communication component defined by the SocLib |
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| 37 | ANR project. |
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| 38 | Nevertheless, these basic schems will be enhanced to allow more efficent |
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| 39 | synthesis. |
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| 40 | \item{VF}{6}{12}{d}{\Stima}{CSG user manual} \setMacroInAuxFile{specCsgManual} |
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| 41 | The CSG user manual of the \specGenManualI delivrable updated with the feed-backs |
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| 42 | of the demonstrator \STs. |
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| 43 | \item{V1}{0}{6}{d}{\Subs}{HAS user manual} \setMacroInAuxFile{specHasManualI} |
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| 44 | It is the first milestone of the HAS user manual that will allow demonstrator |
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| 45 | \STs to start. |
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| 46 | It describes how tasks of task graph must be written (C/C++ subset) and how |
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| 47 | communication schems defined in the {\specCsgManual} delivrable must be described for |
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| 48 | coprocessor synthesis. |
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| 49 | \item{VF}{6}{12}{d}{\Subs}{HAS user manual} \setMacroInAuxFile{specHasManual} |
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| 50 | The HAS user manual of the \specGenManualI delivrable updated with the feed-backs of |
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| 51 | the demonstrator \STs. |
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[21] | 52 | \end{livrable} |
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| 53 | \item This \ST specifies the software COACH structure. The deliverable is a |
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| 54 | document listing all the COACH software components and how they cooperate. |
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| 55 | \begin{livrable} |
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[36] | 56 | \item{}{0}{6}{d}{\Supmc}{decription of \ganttlf software architecture} |
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[21] | 57 | It contains the software list and the data flow among them. |
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| 58 | \end{livrable} |
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| 59 | \item This \ST specifies the \xcoach format. |
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| 60 | \begin{livrable} |
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[36] | 61 | \item{V1}{0}{6}{d+x}{\Slip}{specification of \xcoach format} |
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| 62 | \setMacroInAuxFile{specXcoachDocI} |
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| 63 | First release of the XML specification of the \xcoach format (DTD) |
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[21] | 64 | and its associated documentation allowing to start HLS tools development. |
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[36] | 65 | \item{V2}{6}{12}{d+x}{\Slip}{specification of \xcoach format} |
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| 66 | \setMacroInAuxFile{specXcoachDocII} |
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[21] | 67 | Second release of XML specification of the \xcoach format |
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| 68 | taking into account the corrections and modifications that the |
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[36] | 69 | developers of HAS tools rised. |
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| 70 | \item{VF}{12}{18}{d+x}{\Slip}{specification of \xcoach format} |
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| 71 | \setMacroInAuxFile{specXcoachDoc} |
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| 72 | Last release of XML specification of the \xcoach format enhanced with |
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[21] | 73 | the expression of loop potential. |
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[36] | 74 | \item{V1}{6}{12}{x}{\Subs}{C++ to/from \xcoach format} |
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| 75 | \setMacroInAuxFile{specXcoachToCI} |
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| 76 | This delivrable is composed of 2 softwares. |
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| 77 | The first software is a GCC plugin that generates a \xcoach description |
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| 78 | (defined in \specXcoachDocI deliverable) from a C++ task description |
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| 79 | (defined in \specHasManual deliverable). |
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| 80 | The second software regenerates a C description from a \xcoach |
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[21] | 81 | description. |
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[36] | 82 | \item{VF}{12}{18}{x}{\Subs}{C++ to/from \xcoach format} |
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| 83 | \setMacroInAuxFile{specXcoachToC} |
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| 84 | The same softwares as the former (\specXcoachToCI) but for \xcoach format defined |
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| 85 | in the {\specXcoachDoc} deliverable and HAS input defined in the {\specHasManual} |
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| 86 | deliverable. |
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| 87 | \item{V1}{12}{18}{x}{\Supmc}{\xcoachplus format to SystemC} |
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| 88 | \setMacroInAuxFile{specXcoachToSystemCI} |
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| 89 | The first release of a program that translates \xcoachplus description to CABA |
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| 90 | and TLM-DT SystemC module. |
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| 91 | \item{VF}{18}{24}{x}{\Supmc}{\xcoachplus format to SystemC} |
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| 92 | \setMacroInAuxFile{specXcoachToSystemC} |
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| 93 | Maintenance work of the former software (\specXcoachToSystemCI). |
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| 94 | \item{V1}{12}{18}{x}{\Subs}{\xcoachplus format to VHDL} |
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| 95 | \setMacroInAuxFile{specXcoachToVhdlI} |
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| 96 | The first release of a program that translates \xcoachplus description to |
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[21] | 97 | synthesizable VHDL description. |
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[36] | 98 | \item{VF}{18}{24}{x}{\Subs}{\xcoachplus format to VHDL} |
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| 99 | \setMacroInAuxFile{specXcoachToVhdl} |
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| 100 | Maintenance work of the former software (\specXcoachToVhdlI). |
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[21] | 101 | \end{livrable} |
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| 102 | \item Backend HLS tools use a characterized macro-cell library to build the |
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| 103 | micro-architecture of a coprocessor. The characterisation of a cell dépends |
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| 104 | on the target device. The role of this \ST is to define the macro-cells and |
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| 105 | to provite a tool that characterizes them automatically by synthesizing them |
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| 106 | and by extracting their delays. This is done by using RTL synthesis. |
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| 107 | \begin{livrable} |
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[35] | 108 | \item{}{0}{6}{d}{\Subs}{macro-cell definition} |
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[21] | 109 | The document define the macro cell and the file format describing them. |
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[36] | 110 | \item{}{6}{12}{x}{\Subs}{macro-cell library generator} |
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[21] | 111 | A progam that generates automatically the characterized macro-cell library |
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| 112 | for a FPGA device. |
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| 113 | \end{livrable} |
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| 114 | \end{workpackage} |
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