1 | \begin{taskinfo} |
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2 | \let\IRISA\leader |
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3 | \let\BULL\enable |
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4 | \let\THALES\enable |
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5 | \let\NAVTEL\enable |
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6 | \let\ZIED\enable |
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7 | \end{taskinfo} |
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8 | % |
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9 | \begin{objectif} |
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10 | This task groups the demonstrators of the COACH project. |
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11 | The demonstrators cover various domains and application types to drive |
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12 | the specification choices and to check most of the COACH features. |
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13 | \end{objectif} |
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14 | % |
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15 | \begin{workpackage} |
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16 | \subtask This \ST relies to the COACH use by \bull. |
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17 | \mustbecompleted{FIXME:BULL ajouter quelques lignes pour donner |
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18 | 1) type d'application (HPC ou embedded system, HLS), |
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19 | 2) domaine (RADAR, VIDEO, ...) |
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20 | 3) et si possible l'interet de BULL dans COACH.} |
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21 | \begin{livrable} |
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22 | \itemV{0}{6}{d}{\Sbull}{\bull demonstrator} |
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23 | The deliverable is a document that describes the application that will be use as |
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24 | demonstrator. |
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25 | \itemV{6}{12}{x}{\Sbull}{\bull demonstrator} |
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26 | The deliverable is the specification of the demonstrator in COACH input format |
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27 | defined in the {\specGenManual} deliverable. |
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28 | \itemL{12}{36}{d}{\Sbull}{\bull demonstrator}{9:6:5} |
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29 | Validation of the demonstrator, the deliverable is a document |
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30 | describing the result of the experimentations. |
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31 | \end{livrable} |
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32 | |
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33 | \subtask The objective of this sub-task is to specify the application and to develop the |
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34 | high level code. The application is in the domain of surveillance of critical |
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35 | infrastructures. |
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36 | The objective is to detect and classify the presence of humans in the restricted area. |
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37 | The algorithm is based on the work of Viola and Jones\cite{thales-viola}. |
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38 | It implements in particular a cascade of classifiers operating on Haar like features, |
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39 | where simple weak classifiers at the beginning of the cascade reject a majority of |
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40 | void sub-windows, before more complex classifiers concentrate on potential regions of |
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41 | interest. |
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42 | This application is computation intensive and also makes an intensive use of binary |
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43 | decision trees to cascade the filters, which makes it a good candidate to assess the |
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44 | association of CAL with parallelizing tools.\\ |
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45 | Moreover, the higher levels of computing can involve tracking and data fusion between |
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46 | several camera streams and some other informations. |
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47 | The targeted system will be composed of one camera connected to a PC. |
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48 | All the computing part of the application is executed on a FPGA board connected to the |
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49 | PC. |
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50 | \begin{livrable} |
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51 | \itemV{0}{6}{d}{\Sthales}{\thales demonstrator (step 1)} |
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52 | \setMacroInAuxFile{trtAppSpecification} |
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53 | This delivrable is a document that specifies the application. |
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54 | \itemL{6}{12}{x}{\Sthales}{\thales demonstrator (step 1)}{6:0:0} |
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55 | This delivrable is the code of the application spcecified former |
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56 | delivrable (\trtAppSpecification). |
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57 | \end{livrable} |
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58 | |
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59 | \subtask \TRT will use its internal software environment tool SPEAR DE to describe the |
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60 | application. The tool is able to partition and to generate the code for the target. \\ |
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61 | In this task, we will adapt SPEAR DE to generate the application description input of |
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62 | COACH framework. We will also describe the three templates of architecture in order to |
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63 | be able to partition the application on the architecture. |
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64 | \begin{livrable} |
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65 | \itemL{6}{18}{x}{\Sthales}{SPEAR-DE adaptation}{6:6:0} |
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66 | \setMacroInAuxFile{trtSpearde} |
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67 | Adaptation of SPEAR-DE for COACH framework. |
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68 | \end{livrable} |
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69 | |
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70 | \subtask |
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71 | abbbaaa |
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72 | \begin{livrable} |
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73 | \itemL{6}{18}{x}{\Sthales}{SPEAR-DE adaptation}{6:6:0} |
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74 | \setMacroInAuxFile{trtSpearde} |
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75 | bbbb Adaptation of SPEAR-DE for COACH framework. |
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76 | \end{livrable} |
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77 | |
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78 | \subtask |
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79 | In this task, \TRT will evaluate the COACH platform. In particular, \TRT will verify |
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80 | its ability to generate a whole VHDL of an embedded system on FPGA for an application |
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81 | mixing control and data flow aspects. \TRT will evaluate the performance of the |
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82 | generated system in terms of GOPS, and the design time from a high level description. |
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83 | \begin{livrable} |
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84 | \itemV{18}{24}{d+x}{\Sthales}{\thales demonstrator (step 2)} |
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85 | This delivrable is a document describing the result got for the application |
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86 | (\trtAppSpecification) with SPEAR-DE (\trtSpearde) using COACH milestone of T0+18. |
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87 | The updated code of the application will be also provide. |
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88 | \itemV{24}{30}{d+x}{\Sthales}{\thales demonstrator (step 2)} |
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89 | This delivrable is a document describing the result got for the application |
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90 | (\trtAppSpecification) with SPEAR-DE (\trtSpearde) using COACH milestone of T0+24. |
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91 | The updated code of the application will be also provide. |
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92 | \itemL{30}{36}{d+x}{\Sthales}{\thales demonstrator (step 2)}{0:6:6} |
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93 | This delivrable is a document that validates and evaluates COACH (final release) |
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94 | for the \thales demonstrators (\trtAppSpecification). |
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95 | The updated code of the application will be also provide. |
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96 | \end{livrable} |
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97 | |
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98 | \subtask FLEXRAS proposes a SoC architecture integrating an embedded FPGA (eFPGA). |
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99 | The architecture is composed essentially of a processor, a bus and several RAMs. |
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100 | The embedded FPGA is connected to the bus and communicates with the other components. |
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101 | The (eFPGA) works in 2 modes: |
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102 | \begin{description} |
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103 | \item[Slave mode] |
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104 | As a DMA, the processor will send the configuration bitstream |
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105 | stored on the RAM to the eFPGA. In this mode, the eFPGA is considered as a |
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106 | writeable memory and is configured by the processor. |
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107 | \item[Master mode] |
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108 | Once the FPGA is programmed, it becomes a coprocessor achieving the aimed task. |
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109 | \end{description} |
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110 | The top architecture of this SoC based-platform will be generated using COACH |
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111 | framework. The application that will be run on the SoC corresponds initially to a |
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112 | graph of software tasks. Critical tasks will be identified and transformed |
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113 | automatically to hardware tasks using COACH high level synthesis feature. While |
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114 | software tasks will be run on the processor, hardware ones will be mapped on eFPGA |
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115 | to take advantage of its optimized resources and parallelism. FLEXRAS provides all |
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116 | the flow from RTL synthesis to bitstream generation. |
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117 | \begin{livrable} |
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118 | \itemL{0}{6}{d}{\Szied}{\zied architecture}{2.4:0:0} |
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119 | FLEXRAS will use IPs provided by LIP6 (vhdl models of SoCLIB) and its eFPGA IP to |
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120 | generate the SoC architecture. |
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121 | This delivrable is a document that describes this architecture. |
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122 | \itemL{6}{12}{h}{\Szied}{eFPGA/VCI component}{3.6:0:0} |
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123 | FLEXRAS has to adapt the eFPGA interface to connect it to the VCI bus. |
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124 | This delivrable is a VHDL description. |
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125 | \itemL{12}{18}{x}{\Szied}{bitstream loader port}{0:3.6:0} |
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126 | Port of the bitstream loader to the MUTEK operating system. |
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127 | \itemL{18}{24}{x}{\Szied}{????????????}{0:2.4:0} |
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128 | \mustbecompleted{FIXME:PAS-CLAIR} |
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129 | FLEXRAS will propose a graph of software tasks. The hardware task to be mapped on |
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130 | the FPGA will be generated using the high level synthesis tool of COACH framework. |
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131 | \itemL{24}{30}{x}{\Szied}{eFPGA characterisation}{0:0:2.4} |
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132 | This delivrable is a file under the format defined by the delivrable |
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133 | \specMacroCell that characterizes the eFPGA. This will allows the COACH HLS tools |
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134 | to run taking into account the eFPGA delays. |
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135 | \itemL{30}{36}{d}{\Szied}{\zied evaluation}{0:0:3.6} |
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136 | This delivrable is a document that describes the tests, the validation and the |
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137 | evaluation of COACH with the \zied architecture and tools. |
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138 | \end{livrable} |
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139 | |
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140 | \subtask This \ST relies to the COACH use by \navtel. |
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141 | \\\mustbecompleted{FIXME:NAVTEL:BEGIN ---------------}\\ |
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142 | INDIQUER en quelques lignes \\ |
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143 | \hspace*{1cm} 1) ce que vous voulez faire \\ |
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144 | \hspace*{1cm} 2) ce que vous allez faire avec COACH \\ |
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145 | Pour les deliverables qu'on voit un rapport avec COACH, |
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146 | et indiquer: la date de debut, la date de fin, le nombre de homme*home |
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147 | pour l'année 1, l'année 2, l'année 3. |
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148 | \par |
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149 | De plus il me faut qq pour la page 42 (voir page precedente). |
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150 | \\\mustbecompleted{FIXME:NAVTEL:END -------------------} |
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151 | \begin{livrable} |
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152 | \itemV{0}{6}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification} |
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153 | %Choice of the demonstrator and its implementation as a PC C/C++ program. |
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154 | Navtel delivers a single node embedded hardware which consists of an ARM |
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155 | processor and a Spartan 6 FPGA for the experimentation of an embedded super |
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156 | computing system. |
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157 | \mustbecompleted{FIXME:NAVTEL On ne voit pas le rapport avec COACH !!!} |
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158 | \itemL{7}{12}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification}{0:0:0} |
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159 | A wrapper technology demonstrator with partial reconfiguration and its interface |
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160 | with real time scheduler. |
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161 | \mustbecompleted{FIXME:NAVTEL 1) On ne voit pas le rapport avec COACH !!! |
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162 | 2) si ca s'arrete la il n'y a aucun lien avec COACH puisque COACH commence |
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163 | seulement a tourner a T0+12 |
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164 | } |
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165 | % \itemV{13}{15}{d}{\Snavtel}{\navtel \ganttlf demonstrator} |
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166 | % This deliverable is a report that describes the experimentation done with the |
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167 | % T0+12 COACH milestone. |
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168 | % \itemV{25}{27}{d}{\Snavtel}{\navtel \ganttlf demonstrator} |
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169 | % This deliverable is a report that describes the experimentation done with the |
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170 | % T0+24 COACH milestone. |
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171 | % \itemL{30}{36}{d}{\Snavtel}{\navtel \ganttlf demonstrator}{0:0:0} |
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172 | % This deliverable is a report that describes the experimentation done with the |
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173 | % pre-final COACH release. |
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174 | \end{livrable} |
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175 | \end{workpackage} |
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