Changeset 134 for anr/section-4.1.tex
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- Feb 13, 2010, 3:24:29 PM (14 years ago)
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anr/section-4.1.tex
r132 r134 32 32 hardware) either as a SystemC simulator to prototype and explore quickly the 33 33 design space or as a bitstream\footnote{COACH generates synthesizable VHDL, and 34 launch the Xilinx or Altera RTL synthesis tools.} directly downloadable on the34 launch the \xilinx or \altera RTL synthesis tools.} directly downloadable on the 35 35 FPGA device\footnote{Additional partial bitstreams are generated in case of 36 36 dynamic partial reconfiguration}. 37 %To proove CSG that COACH is open and CSG is really configurable, COACH will38 %basically support 3 architecture template (the COACH template based on a39 %MIPS processors and a VCI token ring, the Altera template based on the NIOS40 %and AVALON bus, the Xilinx template based on the MICROBLAZE and PLB bus)41 %and 2 operating systems (DNA/OS and MUTEK). Furthermore, thus is enforced42 %by the \mustbecompleted{FIXME:zied} contribution that consists in43 %implementing an other hardware target.44 %\\45 %Finally, it is important to notice that this work is a strong46 %enhancement of the SocLib software.47 37 \parlf 48 38 The software architecture for HAS is presented in figure~\ref{archi-hls}.
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