Changeset 134 for anr/section-5.tex

Timestamp:

Feb 13, 2010, 3:24:29 PM (14 years ago)

Author:

coach

Message:

IA: fixed mutek, altera, xilinx, and neutal architectural template

File:

• anr/section-5.tex (modified) (3 diffs)

anr/section-5.tex

@@ -1 +1 @@
 \subsection{Dissemination}
 
-The Coach project will bring new scientific results in various fields, such as high level synthesis,
+The COACH project will bring new scientific results in various fields, such as high level synthesis,
 hardware/software codesign, virtual prototyping, harware oriented compilation techniques,
 automatic parallelisation, etc. These results will be presented in the relevant International
 Conferences, namely DATE, DAC, or ICCAD. 
 
-More generally, the Coach infrastructure and the design flow supported by the Coach
+More generally, the COACH infrastructure and the design flow supported by the COACH
 tools and libraries will be promoted by proposing tutorials on FPGA oriented system level synthesis
 in various worshops and conferences.
 
 Following the general policy of the SoCLib platform, the COACH project will be an 
-open infrastructure, and the Coach tools and libraries will available in the framework 
+open infrastructure, and the COACH tools and libraries will available in the framework 
 of the SoCLib WEB server. This server will be maintened by the UPMC/LIP6 laboratory. 
 
 \subsection{Exploitation of results}
 
-The main goal of the Coach project is to help SMEs (Small and Medium Enterprises) 
+The main goal of the COACH project is to help SMEs (Small and Medium Enterprises) 
 to enter the world of MPSoC technologies. For small companies, the cost is a primary concern.
 Moreover, these companies have not always in-home expertise in hardware design and VHDL modelling.
-As the fabrication costs of an ASIC is generally too high for SMEs, the Coach project focus
+As the fabrication costs of an ASIC is generally too high for SMEs, the COACH project focus
 on FPGA technologies. Regarding the design tools, the cost of advanced ESL (Electronic System Design) 
-tools is an issue, and the Coach project will follow the same general policy as the SoCLib platform :
+tools is an issue, and the COACH project will follow the same general policy as the SoCLib platform :
 
 \begin{itemize}
 \item
-All software tools supporting the Coach design flow will be available as free software.
-All academic partners contributing to the Coach project agreed to distribute the ESL software
+All software tools supporting the COACH design flow will be available as free software.
+All academic partners contributing to the COACH project agreed to distribute the ESL software
 tools under the same GPL license as the SoCLib tools.  
 \item
@@ -42 +42 @@
 For commercial use, commercial licenses will be negociated between the owners and the customers.
 \item
-The proprietary ALTERA, XILINX and FLEXRAS IP core libraries are commercial products
+The proprietary \altera, \xilinx and \zied IP core libraries are commercial products
 that are not involved by the free software policy, but these libraries will be supported by the 
-synthesis tools developped in the Coach project.
+synthesis tools developped in the COACH project.
 \end{itemize}
 
@@ -59 +59 @@
 
 A global consortium agreement will be defined during the first six monts of the project.
-As already stated, the Coach project has been prepared during one year by a monthly meeting 
+As already stated, the COACH project has been prepared during one year by a monthly meeting 
 involving the five academic partners. The general free software policy described in the 
 previous section has been agreed by academic partners  and has been