Changeset 134 for anr/task-5.tex
- Timestamp:
- Feb 13, 2010, 3:24:29 PM (14 years ago)
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anr/task-5.tex
r130 r134 25 25 26 26 The low level hardware transmission support will be the PCI/X bus which allows high bit-rate 27 transfers. The reasons of this choices are that both ALTERA and Xilinx provide PCI/X IP for27 transfers. The reasons of this choices are that both \altera and \xilinx provide PCI/X IP for 28 28 their FPGA and that GPU HPC softwares use also it. 29 29 %This will allow us at least to be inspired by GPU communication schemes and may be to reuse … … 58 58 The PC part of the HPC communication API that comminicates with the FPGA-SOC, a 59 59 library and probably a LINUX module. 60 \itemL{12}{21}{x}{\Supmc}{HPC API for MUTEK OS}{0:3:0}60 \itemL{12}{21}{x}{\Supmc}{HPC API for MUTEKH OS}{0:3:0} 61 61 \setMacroInAuxFile{hpcMutekDriver} 62 62 The FPGA-SoC part of the communication API, a driver. … … 64 64 Port of the {\hpcMutekDriver} driver on the DNA OS. 65 65 \itemL{24}{33}{x}{\Supmc}{HPC API}{0:0:1} 66 Maintenance work of HPC API for both Linux PC and MUTEK OS.66 Maintenance work of HPC API for both Linux PC and MUTEKH OS. 67 67 \end{livrable} 68 68 \subtask This \ST deals with the implementation of hardware and SystemC modules 69 required by the COACHarchitectural template for using the PCI/X IP of \altera and \xilinx.69 required by the neutral architectural template for using the PCI/X IP of \altera and \xilinx. 70 70 \begin{livrable} 71 71 \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{3:9:0} … … 94 94 The drivers required by the DNA OS in order to manage dynamic partial 95 95 reconfiguration inside the SoC-FPGA. 96 \itemL{30}{36}{x}{\Supmc}{dynamic reconfiguration \ganttlf MUTEK drivers}{0:0:1}97 Port of the {\hpcDynconfDriver} drivers on the MUTEK OS.96 \itemL{30}{36}{x}{\Supmc}{dynamic reconfiguration \ganttlf MUTEKH drivers}{0:0:1} 97 Port of the {\hpcDynconfDriver} drivers on the MUTEKH OS. 98 98 \itemL{24}{36}{x}{\Stima}{Profiler for \ganttlf dynamic reconfiguration}{0:0:6} 99 99 Extension of the HPC partionning helper in order to integrate dynamic partial
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