Changeset 135

Timestamp:

Feb 13, 2010, 9:40:48 PM (15 years ago)

Author:

coach

Message:

IA: fixed references

Location:

anr

Files:

• anr.bib (modified) (2 diffs)
• section-2.2.tex (modified) (1 diff)

anr/anr.bib

@@ -73 +73 @@
 }
 
+@InProceedings{cosy,
+    author = { J.Y Brunel, al },
+    title  = { COSY: a methodology for system design based on reusable hardware \& software IP's},
+    booktitle = { Technologies for the Information Society },
+    publisher = { IOS Press },
+    year      = {1998},
+    pages     = {709-716},
+}
+
 @InProceedings{disydent05,
   author =       {{Ivan Aug\'{e}, Fr\'{e}d\'{e}ric P\'{e}trot, Franï¿œois Donnet and Pascal Gomez}},
@@ -81 +90 @@
   year =         {2005},
 }
+@inproceedings{dspin08,
+ author = {Miro-Panades, Ivan and Clermidy, Fabien and Vivet, Pascal and Greiner, Alain},
+ title = {Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture},
+ booktitle = {NOCS '08: Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip},
+ year = {2008},
+ isbn = {978-0-7695-3098-7},
+ pages = {139--148},
+ publisher = {IEEE Computer Society},
+ address = {Washington, DC, USA},
+ }
+
 
 % HLS

anr/section-2.2.tex

@@ -105 +105 @@
     Regarding system level architecture, the project is based on the know-how
     acquired by the \upmc and \tima laboratories in the framework of various projects  
-    (COSY~\cite{disydent}, or MEDEA-MESA~\cite{dspin}), in the field of communication 
-    architectures for shared memory multi-processors systems.
-    As an example, the DSPIN network on chip, is now used by BULL in the TSAR project.
+    in the field of communication architectures for shared memory multi-processors systems
+    (COSY~\cite{cosy}, DISYDENT~\cite{disydent05} or DSPIN~\cite{dspin08} of MEDEA-MESA).
+    As an example, the DSPIN project is now used in the TSAR project.
   \item
     Regarding Application Specific Instruction Processor (ASIP) design, the