Changeset 144


Ignore:
Timestamp:
Feb 14, 2010, 11:10:18 AM (14 years ago)
Author:
coach
Message:

IA: merged 3 HPC subtask in a single task

File:
1 edited

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  • anr/task-5.tex

    r143 r144  
    3232\end{objectif}
    3333%
    34 \mustbecompleted { FIXME :: Ne doit onpas fusionner les taches ST6-1, ST6-2, ST6-3 et pourquoi pas ST6-4 ???}
    3534\begin{workpackage}
    36 \subtask This \ST is the definition of the communication schemes as a software API
    37     (Application Programing Interface) between the application part running on the PC and
    38     the application part running on the FPGA-SoC.
     35  \subtask
     36    This \ST deals with the COACH HPC feature that consists in accelerating an existing
     37    apllication running on a PC by migrating critical parts into a SoC implemented on an
     38    FPGA plugged to the PC PCI/X bus.
     39    The main steps and components of this \ST are:
     40    \begin{itemize}
     41      \item The definition of the communication middleware as a software API (Application
     42        Programing Interface) between the application part running on the PC and the
     43        application part running on the FPGA-SoC.
     44      \item A software for helping the end-user to partition applications (figure~\ref{archi-hpc}).
     45        This software is a library implementing the communication API with features to profile
     46        the partitioned application.
     47      \item The implementation of the communication API on the both sides (PC part and FPGA-SoC).
     48    \end{itemize}
    3949    \begin{livrable}
    40     \itemL{0}{6}{d}{\Sbull}{HPC communication API}{2.0:0:0}
     50      \itemL{0}{6}{d}{\Sbull}{HPC communication API}{2.0:0:0}
    4151        \setMacroInAuxFile{hpcCommApi}
    4252        Specification describing the API.
    43     \end{livrable}
    44 \subtask This \ST consists in helping to partition applications.
    45     It is a library implementing the communication API with features to profile
    46     the partitioned application.
    47     \begin{livrable}
    48     \itemL{6}{12}{x}{\Supmc}{HPC partionning helper}{1:0:0}
     53      \itemL{6}{12}{x}{\Supmc}{HPC partionning helper}{1:0:0}
     54        \setMacroInAuxFile{hpcCommHelper}
    4955        A library implementing the communication API defined in the {\hpcCommApi} delivrable.
    50     \end{livrable}
    51 \subtask This \ST deals with the implementation of the communication API on the both sides (PC
    52     part and FPGA-SoC).
    53     \begin{livrable}
    54     \itemL{12}{21}{x}{\Supmc}{HPC API for Linux PC}{0:3:0}
     56        This library is dedicated to help the end-user to partition an applicattion for
     57        HPC.
     58      \itemL{12}{21}{x}{\Supmc}{HPC API for Linux PC}{0:3:0}
     59        \setMacroInAuxFile{hpcCommLinux}
    5560        The PC part of the HPC communication API that comminicates with the FPGA-SOC, a
    5661        library and probably a LINUX module.
    57     \itemL{12}{21}{x}{\Supmc}{HPC API for MUTEKH OS}{0:3:0}
     62      \itemL{12}{21}{x}{\Supmc}{HPC API for MUTEKH OS}{0:3:0}
    5863        \setMacroInAuxFile{hpcMutekDriver}
    5964        The FPGA-SoC part of the communication API, a driver.
    60     \itemL{21}{24}{x}{\Stima}{HPC API for DNA OS}{0:3:0}
     65      \itemL{21}{24}{x}{\Stima}{HPC API for DNA OS}{0:3:0}
     66        \setMacroInAuxFile{hpcDnaDriver}
    6167        Port of the {\hpcMutekDriver} driver on the DNA OS.
    62     \itemL{24}{33}{x}{\Supmc}{HPC API}{0:0:1}
    63         Maintenance work of HPC API for both Linux PC and MUTEKH OS.
     68      \itemL{24}{33}{x}{\Supmc}{HPC API}{0:0:1}
     69        Bug corrections and enhancements of communication middleware
     70        (\novers{\hpcCommApi}, \novers{\hpcCommHelper}, \novers{\hpcCommLinux},
     71        \novers{\hpcMutekDriver}, \novers{\hpcDnaDriver}).
    6472    \end{livrable}
     73
    6574\subtask This \ST deals with the implementation of hardware and SystemC modules
    6675    required by the neutral architectural template for using the PCI/X IP of \altera and \xilinx.
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