Changeset 155 for anr/task-2.tex

Timestamp:

Feb 15, 2010, 9:57:43 AM (14 years ago)

Author:

coach

Message:

INRIA/COMPSYS -> LIP

File:

• anr/task-2.tex (modified) (5 diffs)

anr/task-2.tex

@@ -21 +21 @@
 \item the specification of enhanced communication schemes and their sofware and hardware implementations.
 \end{itemize}
-This task being based on the SocLib platform, a first release will be delivrable at $T0+12$
+This task being based on the SocLib platform, a first release will be delivered at $T0+12$
 to allow the demonstrators to start working.
 This release will include the standard communication schemes (base on SocLib MWMR component)
@@ -70 +70 @@
     \itemL{18}{24}{h}{\Stima}{\xilinx architecture}{9:9:0}
         The synthesizable VHDL description of the MWMR component corresponding to the
-        SystemC module of the former delivrable (\csgXilinxSystemC).
+        SystemC module of the former deliverable (\csgXilinxSystemC).
     \itemL{24}{27}{d}{\Sxilinx}{\xilinx RTL optimisation (3)}{0:0:1.5}
        This deliverable consists in optimizing the MWMR VHDL description (deliverable
@@ -83 +83 @@
     \itemL{18}{24}{h}{\Sirisa}{\altera architecture}{6:6:0}
         The synthesizable VHDL description of the MWMR component corresponding to the
-        SystemC module of the former delivrable (\csgAlteraSystemC);
+        SystemC module of the former deliverable (\csgAlteraSystemC);
     \itemV{6}{12}{d}{\Subs}{UBS communication adapter}
        \setMacroInAuxFile{gautCOMMoptimization}
@@ -102 +102 @@
 \subtask This \ST consists of the configuration of the SocLib MUTEKH and DNA operating
     system and the development of drivers for the hardware architectural templates
-    and enhanced communication schemes defined in \novers{\specCsgManual} delivrable.
+    and enhanced communication schemes defined in \novers{\specCsgManual} deliverable.
     For the \altera and \xilinx architectural templates, the OSs must also be ported on
     the NIOS2 and MICROBLAZE processors.
     \begin{livrable}
     \itemV{6}{8}{x}{\Supmc}{MUTEKH OS}
-        The drivers required for the first CSG milestone (delivrable \csgCoachArch).
+        The drivers required for the first CSG milestone (deliverable \csgCoachArch).
     \itemV{8}{18}{x}{\Supmc}{MUTEKH 0S}
         The drivers required for the second CSG milestone ({\csgPrototypingOnly}).
@@ -115 +115 @@
         Porting of MUTEKH OS on the NIOS2 and MICROBLAZE processors.
     \itemV{6}{8}{x}{\Stima}{DNA OS}
-        The drivers required for the first CSG milestone (delivrable \csgCoachArch).
+        The drivers required for the first CSG milestone (deliverable \csgCoachArch).
     \itemV{8}{18}{x}{\Stima}{DNA 0S}
         The drivers required for the second CSG milestone ({\csgPrototypingOnly}).