Changeset 192 for anr


Ignore:
Timestamp:
Feb 16, 2010, 12:25:27 AM (15 years ago)
Author:
coach
Message:
 
Location:
anr
Files:
2 deleted
5 edited

Legend:

Unmodified
Added
Removed
  • anr/Makefile

    r167 r192  
    1515                table_tima_full.tex table_tima_short.tex \
    1616                table_inria_cairn_full.tex table_inria_cairn_short.tex \
    17                 table_lip_full.tex table_lip_short.tex \
     17                table_inria_compsys_full.tex table_inria_compsys_short.tex \
    1818                table_ubs_full.tex table_ubs_short.tex \
    1919                table_xilinx_full.tex table_xilinx_short.tex \
  • anr/anr.tex

    r167 r192  
    179179
    180180% 2.2
     181\newpage
    181182\pagefeed\subsection{Relevance of the proposal}
    182183\anrdoc{(2 pages maximum) Préciser :\begin{itemize}
  • anr/section-6.1.tex

    r167 r192  
    260260\zied is a spin-off from LIP6 (Laboratoire Informatique Paris 6) and was awarded at the
    261261French National Competition for Business Startup and Innovative Technology in 2007 and
    262 2009 in “emergence” and “creation” categories respectively.
     2622009 in "emergence" and "creation" categories respectively.
    263263
    264264%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
  • anr/section-7.tex

    r174 r192  
    3434
    3535\subsection{Partner 2: \lip}
    36 \begin{figure}\leavevmode\center
    37 \input{table_lip_full.tex}
    38 \caption{\label{ress-detail-lip}Man power in $mm$ for the deliverables of \lip.}
    39 \end{figure}
     36
    4037\begin{description}
    4138\item [Equipment]
     
    5855  the personnal costs. The requested funding for non
    5956  permanent personnels is 100\% of the total ANR requested funding.
    60   \begin{center}\input{table_lip_short.tex}\end{center}
     57  \begin{center}\input{table_inria_compsys_full.tex}\end{center}
    6158\item [Subcontracting]
    6259  No subcontracting costs.
     
    238235\subsection{Partner 9: \zied}
    239236
    240   \begin{center}\input{table_zied_full.tex}\end{center}
     237\begin{description}
     238\item[Equipment]
     239    No equipement costs.
     240\item[Personnel costs]
     241    The effort to define SoC architecture and adapt eFPGA interface to generate is
     242    estimated to 9.6 \hommemois.
     243    The effort to develop demonstrator and to extract eFPGA timining characteristics is
     244    estimated to 4.8 \hommemois.
     245    Finally we need one 3.6 man.month for the evaluation of the FLEXRAS solution.
     246    The table below summarizes the these manpower costs in \hommemois for the deliverables
     247    and by tasks.
     248    \begin{center}\input{table_zied_full.tex}\end{center}
     249\item[Subcontracting]
     250    No subcontracting costs.
     251\item[Travel]
     252    No travel costs.
     253\item[Expenses for inward billing] none
     254\item[Other working costs] none
     255\end{description}
    241256
    242257%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
     
    251266    A permanent engineer will be assigned on average 1/3 time for
    252267        all the duration of the project.
    253     The table below shows the estimated manpower cost in \hommemois for the deliverables.
     268    The table below shows the estimated manpower cost in \hommemois for the deliverables
     269    and by tasks.
    254270    \begin{center}\input{table_navtel_full.tex}\end{center}
    255271\item[Subcontracting]
  • anr/task-6.tex

    r155 r192  
    1616  \subtask
    1717    The application that \bull proposes is HPC oriented.
    18     The domain of the application is the treatment of medical images (e.g. image noise
    19     reduction and camera calibration).
     18    The domain of the application is the treatment of medical images (image noise
     19    reduction and segmentation or registration).
    2020    Our expectation from COACH project is to enhance the \bull HPC solutions that
    2121    are currently based on multi-cores and GPUs with fine grain parallelism on FPGA.
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