- Timestamp:
- Feb 16, 2010, 9:21:42 AM (15 years ago)
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anr/task-2.tex
r187 r203 84 84 The synthesizable VHDL description of the MWMR component corresponding to the 85 85 SystemC module of the former deliverable (\csgAlteraSystemC); 86 \itemV{6}{12}{d}{\Subs}{UBS communication adapter} 86 \itemV{6}{12}{d}{\Subs}{UBS communication adapter}{1:0:0} 87 87 \setMacroInAuxFile{gautCOMMoptimization} 88 88 Specification of an optimized communication adapter (space and time) component to handle data interleaving. 89 89 This evolution aims to solve out of order communication weakness of the classical MWMR. 90 \itemV{12}{24}{x}{\Subs}{UBS communication adapter} 90 \itemV{12}{24}{x}{\Subs}{UBS communication adapter}{0:6:0} 91 91 First release of the tool that generates the VHDL description of the optimized communication adapter 92 92 and its corresponding SystemC module. 93 \itemL{24}{30}{x}{\Subs}{UBS communication adapter}{0:0: 0}93 \itemL{24}{30}{x}{\Subs}{UBS communication adapter}{0:0:2} 94 94 Final release of the tool that generates the VHDL description of the optimized 95 95 communication adapter and its corresponding SystemC module (\gautCOMMoptimization).
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