Changeset 23
- Timestamp:
- Jan 7, 2010, 12:24:14 PM (15 years ago)
- Location:
- anr
- Files:
-
- 3 added
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
anr/anr.tex
r21 r23 38 38 \def\ubs{UBS\xspace} % LAB-STICC 39 39 \def\upmc{LIP6\xspace} 40 \def\altera{ALTERA\xspace} 41 \def\xilinx{XILINX\xspace} 40 42 \def\bull{BULL\xspace} 41 43 \def\thales{THALES\xspace} … … 203 205 \subsubsection{Task 1: \textit{\backbone}} 204 206 \input{task-1} 207 208 \subsubsection{Task 2: \textit{system generation}} 209 \input{task-2} 210 211 \subsubsection{Task 3: \textit{HAS front-end}} 212 %\input{task-3} 213 214 \subsubsection{Task 4: \textit{HAS back-end}} 215 %\input{task-4} 216 217 \subsubsection{Task 5: \textit{Communication between PC \& FPGA-SoC}} 218 \input{task-5} 219 220 \subsubsection{Task 6: \textit{Demonstrators}} 221 \input{task-6} 205 222 206 223 \subsection{Tasks schedule, deliverables and milestones} -
anr/section-4.1.tex
r21 r23 94 94 partitioning validation (see figure~\ref{archi-hpc}, the sytem drivers for 95 95 both PC and FPGA-SoC sides, the hardware communication components. 96 \item\textbf{Demonstrator :}96 \item\textbf{Demonstrators:} 97 97 This task groups the demostrators of the COACH project. 98 98 \mustbecompleted{FIXME}
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