Changeset 24
- Timestamp:
- Jan 7, 2010, 12:27:31 PM (15 years ago)
- Location:
- anr
- Files:
-
- 2 edited
Legend:
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anr/section-3.2.tex
r20 r24 3 3 (accelerating solutions for existing software applications) and embedded 4 4 applications (implementing an application on a low power standalone 5 device). The design steps are presented figure~\ref{ flow}.5 device). The design steps are presented figure~\ref{coach-flow}. 6 6 \begin{figure}[hbtp]\leavevmode\center 7 7 \includegraphics[width=.8\linewidth]{flow} -
anr/task-2.tex
r23 r24 7 7 \begin{objectif} 8 8 This task relies to the prototyping and the generation of FPGA-SoC digital systems. 9 Its is described on figure~\ref{arc i-csg} and it consists of9 Its is described on figure~\ref{archi-csg} and it consists of 10 10 Its objective is to allows the system designer to explore the system space design by quickly prototyping and then to generate automatically the FPGA-SoC system. 11 11 This task consists of
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