Changeset 250 for anr


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Timestamp:
Feb 17, 2010, 3:27:36 PM (15 years ago)
Author:
coach
Message:

UBS

File:
1 edited

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  • anr/section-1.tex

    r246 r250  
    4242\begin{description}
    4343\item[Design Space Exploration:]
    44     The COACH environment will support design space exploration to help the
    45     system designer to select and parameterize the target architecture, and to
    46     define the proper hardware/software partitioning of the application.
     44
     45    The COACH environment will allow to describe an application as a process
     46        network i.e. a set of tasks communicating through FIFO channels.
     47        COACH will allow to map the application on a shared-memory, MPSoC architecture.
     48    It will permit to easily explore the design space to help the system designer
     49        to define the proper hardware/software partitioning of the application.
    4750    For each point in the design space, metrics such as throughput, latency, power
    4851    consumption, silicon area, memory allocation and data locality will be provided.
    4952    These criteria will be evaluated by using the SoCLib virtual prototyping infrastructure
    5053    and high-level estimation methodologies.
    51         \mustbecompleted{FIXME :: Question que l'on peut se poser sur DSE : quelle est la nouveaté la dedans ?
    52         Doit on parler ici de modele de programmation, de mapping... qui permettent un DSE?}
    5354       
    5455\item[Hardware Accelerators Synthesis (HAS):]
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