Changeset 313


Ignore:
Timestamp:
Jan 18, 2011, 8:46:20 AM (14 years ago)
Author:
coach
Message:

Fixed references.

Location:
anr
Files:
5 edited

Legend:

Unmodified
Added
Removed

  • anr/anr.bib

    r312 r313  
    11%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    22%%%%% MDS
    3 @inproceedings{mds:2008,
    4  author = {Kruijtzer Wido, Van der Wolf Pieter, de Kock Erwin, Stuyt Jan, Wolfgang Ecker, Mayer Albrecht, Hustin Serge, Amerijckx Christophe, de Paoli Serge and Vaumorin Emmanuel},
    5  title = {Industrial IP integration flows based on IP-XACT standards},
    6  booktitle = {Proceedings of the conference on Design, automation and test in Europe},
    7  series = {DATE '08},
    8  year = {2008},
    9  isbn = {978-3-9810801-3-1},
    10  location = {Munich, Germany},
    11  pages = {32--37},
    12  numpages = {6},
    13  url = {http://doi.acm.org/10.1145/1403375.1403386},
    14  doi = {http://doi.acm.org/10.1145/1403375.1403386},
    15  acmid = {1403386},
    16  publisher = {ACM},
    17  address = {New York, NY, USA},
     3%Stuyt Jan, Wolfgang Ecker, Mayer Albrecht, Hustin Serge, Amerijckx Christophe,
     4%de Paoli Serge and Vaumorin Emmanuel
     5@inproceedings{mds1,
     6  author    = {Kruijtzer Wido, Van der Wolf Pieter, de Kock Erwin and All},
     7  title     = {Industrial IP integration flows based on IP-XACT standards},
     8  booktitle = {Proceedings of the conference on Design, automation and test in Europe},
     9  series    = {DATE'08},
     10  year      = {2008},
     11  isbn      = {978-3-9810801-3-1},
     12  location  = {Munich, Germany},
     13  pages     = {32--37},
     14  numpages  = {6},
     15  url       = {http://doi.acm.org/10.1145/1403375.1403386},
     16  doi       = {http://doi.acm.org/10.1145/1403375.1403386},
     17  acmid     = {1403386},
     18  publisher = {ACM},
     19  address   = {New York, NY, USA},
    1820}
    1921
    20 @report{rapportministere,
    21  author = {Eric Bant\'egnie, Claude Lepape, Jean-Luc Dormoy},
    22  title = {Briques g\'en\'eriques du logiciel embarqu\'e},
    23  year = {2010},
    24  publisher = {Mininist\'ere de l'industrie},
     22@misc{mds2,
     23  author       = {E. Vaumorin, M. Palus, F. Clermidy and J. Martin},
     24  title        = {SPIRIT IP-XACT Controlled ESL Design Tool Applied to a Network-on-Chip Platform},
     25  howpublished = {\url{http://www.design-reuse.com/articles/18613/ip-xact-esl-noc.html}},
     26  year         = {2008},
     27}
     28
     29@misc{socketflow,
     30  author       = {L. Maillet-Contoz, R. Lucas and E. Vaumorin},
     31  title        = {SocKET design flow and Application on industrial use cases},
     32  howpublished = {\url{http://socket.imag.fr/Presentations-socket/Vendredi15/Presentation_flot.pdf}},
     33  note         = {home site: \url{http://socket.imag.fr/}},
     34  year         = {2010},
     35}
     36
     37@techreport{rapport-ministere,
     38 author      = {Eric Bant\'egnie, Claude Lepape, Jean-Luc Dormoy},
     39 title       = {Briques g\'en\'eriques du logiciel embarqu\'e},
     40 year        = {2010},
     41 institution = {Mininist\'ere de l'industrie},
    2542}
    2643
    … …  
    199216
    200217
    201 @INBOOK{HLSBOOK,
     218@BOOK{HLSBOOK,
    202219  author    = {P. Coussy and A. Morawiec},
    203   booktitle = {High-Level Synthesis: From Algorithm to Digital Circuits},
     220  title = {High-Level Synthesis: From Algorithm to Digital Circuits},
    204221  publisher = {Springer},
    205222  year      = {2008},
    206223}
    207224
    208 @INBOOK{CATRENE,
     225@BOOK{CATRENE,
    209226  author    = {CATRENE, Cluster for Application and Technology Research in Europe on NanotElectronics},
    210   booktitle = {European Roadmap for EDA},
     227  title = {European Roadmap for EDA},
    211228  publisher = {CATRENE, Cluster for Application and Technology Research in Europe on NanotElectronics},
    212229  year      = {2009},

  • anr/section-etat-de-art.tex

    r310 r313  
    226226\subsubsection{SoC design flow automation using IP-XACT}
    227227\label{soa:ip-xact}
     228% EV: Industrial IP integration flows based on IP-XACT standards: \cite{mds1}\\
     229% EV: SPIRIT IP-XACT Controlled ESL Design Tool Applied to a Network-on-Chip Platform: \cite{mds2}\\
     230% EV: SocKET design flow and Application on industrial use cases: \cite{socketflow}\\
    228231IP-XACT is an XML based open standard defined by the Accellera consortium.
    229232This non-profit organisation provides a unified set of high quality IP-XACT

  • anr/section-objectif.tex

    r297 r313  
    112112\\
    113113The framework functionalities will be demonstrated with the demonstrators
    114 (see task-7 page~\pageref{task-7}) and the tutorial example (see task-8
    115 page~\ref{subtask-tutorial}).
     114(see task-7 page~\pageref{task-demonstrator}) and the tutorial example (see task-8
     115page~\pageref{subtask-tutorial}).

  • anr/task-csg.tex

    r311 r313  
    1515  \item The CSG software that generates the SystemC simulators for prototyping
    1616    and the FPGA-SoC system including its bitstream and software executable code
    17     (see Figure~\ref{architecture-csg} and ~\ref{architecture-hls}).
     17    (see Figure~\ref{archi-csg} and ~\ref{archi-hls}).
    1818\end{itemize}
    1919A first release will be delivered at $T0+12$ to allow the demonstrators to start working.

  • anr/task-demonstrator.tex

    r312 r313  
     1\label{task-demonstrator}
    12\begin{taskinfo}
    23\let\MDS\enable
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