- Timestamp:
- Jan 18, 2011, 8:33:56 PM (14 years ago)
- Location:
- anr
- Files:
-
- 6 edited
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anr/annexe-reponse.tex
r311 r315 20 20 les environnements industriels QUARTUS \& ISE. 21 21 \t%\note{O.2} 22 Pour la synthÚse de SoC, on pourrait effectivement utilis édes outils22 Pour la synthÚse de SoC, on pourrait effectivement utiliser des outils 23 23 tels \mustbecompleted{XXX ou XXX}. 24 24 Nous avons choisi DSX/SoCLib, car il est open source, et c'est celui que 25 nous maitrisons le plus et nous savons déjà que son tmoteur couvre une25 nous maitrisons le plus et nous savons déjà que son moteur couvre une 26 26 grande partie des besoins de COACH à ce niveau. 27 27 \t\note{INT} -
anr/section-consortium-people.tex
r312 r315 35 35 coordinator & Vaumorin & Emannuel & Strategic Project Manager & ESL & 20 & Project leader \\\hline 36 36 contributor & Spasevski & Cyril & CTO & EDA & 6 & Technical specifications \\\hline 37 contributor & Guntz & St\'ephane & VP of Engineering & EDA & 12 & Demonstrator specification and management \\\hline 38 contributor & Lucas & Ronan & R\&D Engineer & HW/SW Codesign & 12 & Tools and demonstrator implementation \\\hline 37 contributor & Guntz & St\'ephane & VP of Engineering & EDA & 6 & Demonstrator specification and management \\\hline 38 contributor & Lucas & Ronan & R\&D Engineer & HW/SW Codesign & 9 & Tools and demonstrator implementation \\\hline 39 contributor & Olivier & Garry & R\&D Engineer & SW development & 9 & Tools and demonstrator implementation \\\hline 39 40 40 41 \peopletabularentry{\irisa} -
anr/section-dissemination.tex
r305 r315 75 75 of the project and presented in annexe~\ref{lettre-soutien}. 76 76 77 \subsection{Indus rial Interest in COACH}77 \subsection{Industrial Interest in COACH} 78 78 79 79 \subsubsection*{Partner: \textit{\mds}} 80 The interest for \mds in this project is multiple. 80 81 81 \mustbecompleted{A COMPLETER: Emmanuel ....} 82 - We will collaborate in experiments for the integration of High Level Synthesis engines into IP-XACT based flow. 83 This point will be very valuable because more and more system integrators are using or considering to use 84 HLS in their flow (e.g. Astrium, Airbus, etc.) 85 86 - \mds has already a leading position in the usage of IP-XACT standard for managing innovative SoC design 87 methodologies. This project will allow to keep the advance in regards with competition by anticipating 88 the next generation platforms hosting mutli cores and programmable logic for coprocessors. 89 90 - HPC is a topic that was not covered yet by \mds with its customers. Thanks to this project, \mds will 91 collaborate with BULL on this point and this will open us doors for new customers market. 92 93 - This project has been set up for maximizing the industrial exploitation of results. The role of \mds will 94 be to ensure this objective and after the project, we expect a growing contribution for rising the turnover (2015: 3 new customers = 150keuros, 95 2016: 5 new customers = 400keuros, 2017: 10 new customers = 1Meuros) 96 82 97 83 98 \subsubsection*{Partner: \textit{\bull}} -
anr/section-etat-de-art.tex
r313 r315 229 229 % EV: SPIRIT IP-XACT Controlled ESL Design Tool Applied to a Network-on-Chip Platform: \cite{mds2}\\ 230 230 % EV: SocKET design flow and Application on industrial use cases: \cite{socketflow}\\ 231 % IA: http://www.design-reuse.com/articles/19895/ip-xact-xml.html \cite{dandr}\\ 231 232 IP-XACT is an XML based open standard defined by the Accellera consortium. 232 233 This non-profit organisation provides a unified set of high quality IP-XACT … … 239 240 systems from concept to production. The last IEEE 1685 release of IP-XACT incorporates 240 241 both RTL and TLM (transaction level modelling) capabilities. Thus it can be used to 241 package IP portfolios and describe their assembly in complex hardware architectures.242 package IP portfolios~\cite{dandr} and describe their assembly in complex hardware architectures.~\cite{mds1}~\cite{mds2} 242 243 These description files are the basis for tool interoperability and data exchange 243 through a common structured data management . Today more than two hundred companies244 through a common structured data management\cite{socketflow}. Today more than two hundred companies 244 245 are members of the consortium and the board is incorporating top actors 245 246 (STM, NXP, TI, ARM, FREESCALE, LSI, Mentor, Synopsys and Cadence), ensuring the -
anr/section-position.tex
r307 r315 38 38 environment, suitable for co-operative and distributed development. 39 39 \item Integration of the solutions and engines being developped into a state of the art SoC and system 40 design flow, using the IP-XACT IEEE 1685 standard .40 design flow, using the IP-XACT IEEE 1685 standard 41 41 \end{itemize} 42 42 COACH outcome will contribute to strengthen Europe's competitive position by developing … … 151 151 %%% 152 152 \subsubsection*{Relevance to the call axis} 153 The COACH project totally fulfills the objectives of the axis 2 "METHODES, 153 This project answer to the global statement of the call "INGENIERIE NUMERIQUE ET SECURITE (INS)" by proposing 154 methods and tools for the design of application to be ran on platforms of the next generation. Results will be gained in term of productivity, 155 time-to-market (automation and code generation) and safety (management of high level sepcifications down to implementation). 156 In this call, the COACH project totally fulfills the objectives of the axis 2 "METHODES, 154 157 OUTILS ET TECHNOLOGIES POUR LES SYSTEMES EMBARQUES". 155 \mustbecompleted{BEGIN-FIXME}156 158 COACH will address new embedded systems architectures by allowing the design of 157 159 Multi-Core Systems-on-Chip (possibly heterogeneous) on FPGA according to the design … … 161 163 API and using hardware accelerator automatically generated. It will also permit to use 162 164 efficiently different dynamic system management techniques and re-configuration mechanisms. 165 The results will be tailored in order to be integrated in standard design flow of critical systems. 163 166 \\ 164 167 COACH will address High-Performance Computing (HPC) by helping designers to accelerate an … … 167 170 configurations, COACH will allow to easily migrate critical parts into an FPGA plugged to the 168 171 PC bus (through a communication link like PCI/X). 169 \mustbecompleted{END-FIXME}170 172 \parlf 171 The COACH project well fits also the axis 5 "USAGES". 172 \mustbecompleted{BEGIN-FIXME} 173 The COACH project has been also shaped to answer to the axis 5 "USAGES". 173 174 COACH will address robotic and control applications by 174 175 allowing to design complex systems based on MPSoC architecture. … … 184 185 process productivity of the cryptographic algorithms hardware synthesis, improving the 185 186 quality and reducing the design time and the cost of synthesised cryptographic devices. 186 \mustbecompleted{END-FIXME}187 187 % 188 188 \subsubsection*{European and international positionning} -
anr/section-ressources.tex
r304 r315 205 205 \subsection{Partner 6: \mdslong} 206 206 207 \mustbecompleted{A COMPLETER: Emmanuel ....}208 207 \begin{ADDEDENV} 209 208 \begin{description} … … 211 210 No specific equipment acquisition is required for this project. 212 211 \item[Personnel costs] 213 \ xilinx employees involved in the project are permanent Software Engineers.212 \mds employees involved in the project are permanent managers, engineers and doctors. 214 213 The man power detail in \hommemois by deliverables is given in 215 214 figure~\ref{table-livrables-1} and a sumary by task in the following table. … … 223 222 \item[Other working costs] none 224 223 \end{description} 225 \end{ADDEDENV} 224 226 225 227 226 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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