Changeset 319 for anr/section-issues.tex

Timestamp:

Jan 20, 2011, 12:50:48 PM (14 years ago)

Author:

coach

Message:

template for Christophe CV, minor language modifications

anr/annexe-cv.tex
anr/section-consortium-people.tex
anr/section-objectif.tex
anr/section-1.tex
anr/section-2.tex
anr/section-position.tex
anr/section-etat-de-art.tex
anr/section-issues.tex

File:

• anr/section-issues.tex (modified) (3 diffs)

anr/section-issues.tex

@@ -33 +33 @@
 thanks to the developpment of design methodologies and tools for embedded systems.
 Unfortunately, the Non Recurring Engineering (NRE) costs involded in the design
-and manufacturing ASICs is very high.
+and manufacturing of ASICs is very high.
 An IC foundry costs several billions of euros and the fabrication of a specific circuit
 costs several millions. For example a conservative estimate for a 65nm ASIC project is 10
-million USD.C onsequently, it is more and more unaffordable to design and fabricate ASICs for low and medium 
+million USD. Consequently, it is more and more unaffordable to design and fabricate ASICs for low and medium 
 volume markets and the new trend for building the new generation products will be multi processors SoCs and programmable logic for co-processsing.
 \\
 According to a market survey (J-M. Chery, CTO ST Microelectronics at European NanoelectronicsForum 2010), the global growth is 30 Billons\$ between 2009-2013 for multimedia and communication sectors; this is 6 times more than all other domains like security, home automation, health.
-The predominance of market of multimedia and communication sectors results in the fact that they are mainly mass market.
+The predominance%paul
+the multimedia and communication sectors 
+%results paul
+are due to their being predominently a mass market.
 %
 \subsubsection*{FPGAs and Embedded Systems}
@@ -84 +87 @@
 \subsubsection*{COACH's contribution to this evolution}
 Nowadays, there are no commercial or academic tools covering the whole design flow
-from the system level specification to the bitstream generation neither for embedded system design
-nor for HPC. 
+from the system level specification to the bitstream generation, either for embedded system design
+or for HPC. 
 \begin{center}\begin{minipage}{.9\linewidth}\textit{
 The aim of the COACH project is to integrate all these design steps into a single design framework
@@ -106 +109 @@
 to launch start-ups in software engineering.
 \\
-So this may increase the total amount of engineers working in this domain: today in France the total is only 26,000 in which 16,000 in big companies \cite{rapport-ministere}.
+So this may increase the total%amount (paul)
+number of engineers working in this domain: today in France the total is only 26,000 of which 16,000 are in big companies \cite{rapport-ministere}.