Changeset 335 for anr/section-project-description.tex

Timestamp:

Jan 28, 2011, 5:22:40 PM (13 years ago)

Author:

coach

Message:

Mise à jour INRIA Rennes - 28 janv

File:

• anr/section-project-description.tex (modified) (3 diffs)

anr/section-project-description.tex

@@ -38 +38 @@
 (one for synthesis, one for simulation).
 For generating the coprocessor of a task mapped as hardware, \verb+CSG+
-controls the HAS tools described below.
+controls the \verb!HAS! (Hardware Accelerator Synthesis) tools described below.
 From these inputs \verb!CSG! can generate the entire system (both software and
 hardware) either as an IP under IP-XACT to integrate the SoC in larger
@@ -52 +52 @@
  architecture or the enhancement of existing template with IP.
 \parlf
-The software architecture for HAS is presented in figure~\ref{archi-hls}.
-The input is a single task of the process network. The HAS tools do not work
+The software architecture for \verb!HAS! is presented in figure~\ref{archi-hls}.
+The input is a single task of the process network. The \verb!HAS! tools do not work
 directly on the C++ task description but on an internal format called
 \xcoach generated by a plugin into the GNU C compiler (GCC). 
@@ -87 +87 @@
         the architectural templates and the design flow.
 \item[Task-3: \textit{System generation}] This task addresses the prototyping and
-    the generation of digital system. Apart from HAS that belongs to task 3
+    the generation of digital system. Apart from \verb!HAS! that belongs to task 3
     and 4, its components are those presented figure~\ref{archi-csg}
     (e.g.  \verb!CSG!, operating systems).